Cross Reference: /src/sys/arch/mips/cavium/dev/octeon

History log of /src/sys/arch/mips/cavium/dev/octeon_pci.c
Revision	Date	Author	Comments
1.5	22-Jun-2020	simonb	Remove unmaintained CNMAC_DEBUG debug code.
1.4	19-Jun-2020	simonb	Simplify interrupt definition: remove mostly unused masks and just configure everything using interrupt numbers.
1.3	31-May-2020	simonb	Rename all Cavium Octeon device driver functions, structs etc from "octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
1.2	01-Jun-2015	matt	branches: 1.2.2; 1.2.18; Rework cavium support in preparation for MULTIPROCESSOR support
1.1	29-Apr-2015	hikaru	Initial import of Cavium Octeon and Octeon Plus SoC and specifically Ubiquiti Networks EdgeRouter LITE support. Currently the ethernet and uart are worked. This support was contributed by Internet Initiative Japan Inc.
1.2.18.2	03-Dec-2017	jdolecek	update from HEAD
1.2.18.1	01-Jun-2015	jdolecek	file octeon_pci.c was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
1.2.2.2	06-Jun-2015	skrll	Sync with HEAD
1.2.2.1	01-Jun-2015	skrll	file octeon_pci.c was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000

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