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History log of /src/sys/arch/mips/include/profile.h
RevisionDateAuthorComments
 1.25  18-Feb-2021  skrll Revert previous... somehow the register names aren't available apparently
 1.24  17-Feb-2021  skrll Use the register name and not its number in _PROF_CPLOAD.

"yes please!" from simon@
 1.23  16-Feb-2021  simonb Working kernel profiling for n32/n64:
- Different MCOUNT and _KERN_MCOUNT macros for n32/n64.
- Don't profile mipsXX_lwp_trampoline().
- Allow a few new instructions in the stub fixups.
 1.22  26-Jul-2020  simonb branches: 1.22.2;
#define<tab>
Nuke trailing whitespace.
 1.21  20-Feb-2011  matt Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
 1.20  24-Dec-2005  perry branches: 1.20.96; 1.20.100; 1.20.106; 1.20.108;
__asm__ -> __asm
__const__ -> const
__inline__ -> inline
__volatile__ -> volatile
 1.19  11-Dec-2005  christos merge ktrace-lwp.
 1.18  07-Aug-2003  agc branches: 1.18.16;
Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.
 1.17  05-Mar-2002  simonb branches: 1.17.14;
ANSIfy.
 1.16  05-Feb-2002  thorpej Don't put `frompc' into a0 in the delay slot of the __mcount
call; `jal __mcount' might be expanded by the assembler, and
thus a bogus `frompc' value could be passed.
 1.15  18-Jul-2000  jeffs branches: 1.15.4; 1.15.8;
Use spl*_noprof routines to raise and lower spl for kernel profiling.
This keeps the SR management more contained in locore, and should
be roughly the same performance as the .text size is less. Talked
to simonb and he was ok with this change.
 1.14  25-May-2000  simonb Fix kernel profiling so that it actually works:
- Add 16 bytes to the stack on entry to _mcount so we don't
overflow it.
- Use inline interrupt {dis,en}abling instead of calling
profiled function in locore.
 1.13  28-Mar-2000  simonb Don't `extern' function declarations. While we're there, remove trailing
blank lines and white space.
 1.12  11-Sep-1998  jonathan branches: 1.12.14;
Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.

Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.

Open issues:
* Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
Code derived from Per Fogelstrom's OpenBSD source doesn't work
on mips3 pmaxes with L2 cache.

* Still some port-specific #ifdefs, for interrupt enable and
pmax L2 cache-size. Needs more thought, but overlaps with
work-in-progress by Tohru and Tsubai on spl()s and related stuff.
 1.11  05-Nov-1997  thorpej asm -> __asm__
 1.10  18-Oct-1997  jonathan branches: 1.10.2;
Make the __mcount entrypoint non-static for kernels, to avoid any
chance of gprof mis-report profile ticks in __mcount to the following
function in libkern (currently _qdivrem).
 1.9  20-Jul-1997  jonathan Use __attribute__((unused). From Chris G. Demetriou <cgd@pa.dec.com>.
 1.8  19-Jul-1997  jonathan Add pointer to _mcount to avoid bogus warnings about unused static function.
(calls from interpolated assembler are invisible to gcc.)

If _KERNEL, add prototypes for non-profiled entrypoints _splhigh(), _splx().
 1.7  11-Nov-1996  jonathan Change "___mcount" -> "__mcount" in asm() code in arch/mips/include/profile.h.
Fixes profiling for non-underscore-prepending toolchains
(elf, e.g., shared libs), and breaks a.out/ecoff toolchains.

May break mips kernel profiling too. Needs more thought, since the
original intent of __mcount vs ___mcount on mips date back to pre-1.0 days.
 1.6  31-May-1995  jonathan Change reference in asm code from ``__mcount'' to ``___mcount'', to be
consistent with the (default) prepending of underscores to identifiers.

Because this reference is inside an ASM string it's too hairy to
conditionalize to support different toolchains that don't prepend underscores.
(Just don't do profiling with such toolchains.)
 1.5  28-Mar-1995  jtc KERNEL -> _KERNEL
 1.4  26-Oct-1994  cgd new RCS ID format.
 1.3  27-May-1994  glass bsd 4.4-lite pmax port as ported to NetBSD
 1.2  27-May-1994  glass upgrade to bsd 4.4-lite code base. only mod is rcsids
 1.1  12-Oct-1993  deraadt branches: 1.1.1;
Initial revision
 1.1.1.1  12-Oct-1993  deraadt pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>
 1.10.2.1  05-Nov-1997  thorpej Update from trunk: asm -> __asm__
 1.12.14.1  20-Nov-2000  bouyer Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
 1.15.8.2  01-Apr-2002  nathanw Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
 1.15.8.1  28-Feb-2002  nathanw Catch up to -current.
 1.15.4.2  16-Mar-2002  jdolecek Catch up with -current.
 1.15.4.1  11-Feb-2002  jdolecek Sync w/ -current.
 1.17.14.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.17.14.2  18-Sep-2004  skrll Sync with HEAD.
 1.17.14.1  03-Aug-2004  skrll Sync with HEAD
 1.18.16.1  21-Jun-2006  yamt sync with head.
 1.20.108.1  05-Mar-2011  bouyer Sync with HEAD
 1.20.106.1  06-Jun-2011  jruoho Sync with HEAD.
 1.20.100.1  05-Mar-2011  rmind sync with head
 1.20.96.1  15-Feb-2010  matt Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]

Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.

Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:

void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}

mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.

The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.

A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
 1.22.2.1  03-Apr-2021  thorpej Sync with HEAD.

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