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History log of /src/sys/arch/sbmips/include/intr.h
RevisionDateAuthorComments
 1.10  20-Feb-2011  matt Merge from matt-nb5-mips64.
Add pci support.
new interrupt code.
Adapt to new world order for MIPS
 1.9  03-Dec-2007  ad branches: 1.9.36; 1.9.40; 1.9.46; 1.9.48;
Interrupt handling changes, in discussion since February:

- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.
 1.8  17-Oct-2007  garbled branches: 1.8.2;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
 1.7  17-Jun-2007  tsutsui branches: 1.7.8; 1.7.10;
Move declaretions of _spl*() and _{clr,set}softintr() functions
(which are in mips/locore.S) into <mips/locore.h>
from various MD files.
 1.6  16-Feb-2007  ad branches: 1.6.6; 1.6.8; 1.6.14;
Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.
 1.5  21-Dec-2006  yamt merge yamt-splraiseipl branch.

- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
 1.4  11-Nov-2005  simonb branches: 1.4.22; 1.4.24;
Switch to the MIPS generic soft interrupt code instead of using
port-specific code.
 1.3  25-Oct-2003  simonb branches: 1.3.16;
Switch from intrcnt interrupt account to event counters.
 1.2  07-Feb-2003  cgd branches: 1.2.2;
Update to consistently use Broadcom GPL-compatible license on all SiByte code.
 1.1  06-Mar-2002  simonb branches: 1.1.10; 1.1.12;
A basic port to the Broadcom/SiByte SB1250 evaluation board (the
"swarm"). Other SB-cpu boards will be supported by this port in
the future.

Includes support for on-chip ethernet and serial. Many features
still missing - notably SMP, PCI/LDT and IDE.

This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
 1.1.12.2  06-Mar-2002  simonb A basic port to the Broadcom/SiByte SB1250 evaluation board (the
"swarm"). Other SB-cpu boards will be supported by this port in
the future.

Includes support for on-chip ethernet and serial. Many features
still missing - notably SMP, PCI/LDT and IDE.

This code is provided by the Broadband Processor Business Unit at
Broadcom Corp with minor updates by me.
 1.1.12.1  06-Mar-2002  simonb file intr.h was added on branch nathanw_sa on 2002-03-06 02:13:45 +0000
 1.1.10.2  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.1.10.1  06-Mar-2002  jdolecek file intr.h was added on branch kqueue on 2002-06-23 17:40:11 +0000
 1.2.2.4  11-Dec-2005  christos Sync with head.
 1.2.2.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.2.2.2  18-Sep-2004  skrll Sync with HEAD.
 1.2.2.1  03-Aug-2004  skrll Sync with HEAD
 1.3.16.5  07-Dec-2007  yamt sync with head
 1.3.16.4  03-Sep-2007  yamt sync with head.
 1.3.16.3  26-Feb-2007  yamt sync with head.
 1.3.16.2  30-Dec-2006  yamt sync with head.
 1.3.16.1  21-Jun-2006  yamt sync with head.
 1.4.24.3  24-Sep-2006  yamt remove a duplicated IPL_SERIAL.
 1.4.24.2  24-Sep-2006  yamt fix typos.
 1.4.24.1  23-Sep-2006  yamt implement splraiseipl for sbmips.
 1.4.22.1  12-Jan-2007  ad Sync with head.
 1.6.14.1  26-Jun-2007  garbled Sync with HEAD.
 1.6.8.1  11-Jul-2007  mjf Sync with head.
 1.6.6.2  03-Dec-2007  ad Sync with HEAD.
 1.6.6.1  15-Jul-2007  ad Sync with head.
 1.7.10.2  09-Jan-2008  matt sync with HEAD
 1.7.10.1  06-Nov-2007  matt sync with HEAD
 1.7.8.1  09-Dec-2007  jmcneill Sync with HEAD.
 1.8.2.1  08-Dec-2007  mjf Sync with HEAD.
 1.9.48.1  05-Mar-2011  bouyer Sync with HEAD
 1.9.46.1  06-Jun-2011  jruoho Sync with HEAD.
 1.9.40.1  05-Mar-2011  rmind sync with head
 1.9.36.1  23-Feb-2010  matt Instead of a read-only ipl_sr_bits, define a ipl_sr_map struct and fill that
in the interrupt init routine. There's a default ipl_sr_map will operate
correctly, but isn't performant.

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