intr.h revision 1.7.10.1 1 /* $NetBSD: intr.h,v 1.7.10.1 2007/11/06 23:21:43 matt Exp $ */
2
3 /*
4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions. Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce and
14 * retain this copyright notice and list of conditions as they appear in
15 * the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Broadcom Corporation. The "Broadcom Corporation" name may not be
19 * used to endorse or promote products derived from this software
20 * without the prior written permission of Broadcom Corporation.
21 *
22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #ifndef _SBMIPS_INTR_H_
36 #define _SBMIPS_INTR_H_
37
38 #include <machine/systemsw.h>
39 #include <mips/locore.h>
40
41 /* Interrupt levels */
42 #define IPL_NONE 0
43 #define IPL_SOFT 1 /* generic software interrupts */
44 #define IPL_SOFTCLOCK 2 /* clock software interrupts */
45 #define IPL_SOFTNET 3 /* network software interrupts */
46 #define IPL_SOFTSERIAL 4 /* serial software interrupts */
47 #define IPL_BIO 5
48 #define IPL_NET 6
49 #define IPL_TTY 7
50 #define IPL_VM 8
51 #define IPL_CLOCK 9
52 #define IPL_STATCLOCK 10
53 #define IPL_SCHED 11
54 #define IPL_SERIAL 12
55 #define IPL_HIGH 13
56 #define IPL_LOCK 14
57 #define _NIPL 15
58
59 #define SI_SOFT 0
60 #define SI_SOFTCLOCK 1
61 #define SI_SOFTNET 2
62 #define SI_SOFTSERIAL 3
63
64 #define SI_NQUEUES 4
65
66 #define SI_QUEUENAMES { \
67 "misc", \
68 "clock", \
69 "net", \
70 "serial", \
71 }
72
73 #define _IMR_SOFT (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1)
74 #define _IMR_VM (_IMR_SOFT | MIPS_INT_MASK_0)
75 #define _IMR_SCHED (_IMR_VM | MIPS_INT_MASK_1 | MIPS_INT_MASK_5)
76 #define _IMR_SERIAL (_IMR_SCHED | MIPS_INT_MASK_2)
77 #define _IMR_HIGH (MIPS_INT_MASK)
78
79 #define splsoftclock() _splraise(_IMR_SOFT)
80 #define splsoftnet() _splraise(_IMR_SOFT)
81 #define splsoftserial() _splraise(_IMR_SOFT)
82 #define splbio() _splraise(_IMR_VM)
83 #define splnet() _splraise(_IMR_VM)
84 #define spltty() _splraise(_IMR_VM)
85 #define splvm() _splraise(_IMR_VM)
86 #define splclock() _splraise(_IMR_SCHED)
87 #define splstatclock() _splraise(_IMR_SCHED)
88 #define splsched() _splraise(_IMR_SCHED)
89 #define splserial() _splraise(_IMR_SERIAL)
90 #define splhigh() _splraise(_IMR_HIGH)
91 #define spllock() splhigh()
92
93 #define spl0() _spllower(0)
94 #define splx(s) _splset(s)
95
96 typedef int ipl_t;
97 typedef struct {
98 ipl_t _spl;
99 } ipl_cookie_t;
100
101 ipl_cookie_t makeiplcookie(ipl_t);
102
103 static inline int
104 splraiseipl(ipl_cookie_t icookie)
105 {
106
107 return _splraise(icookie._spl);
108 }
109
110 #include <mips/softintr.h>
111
112 #endif /* _SBMIPS_INTR_H_ */
113