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History log of /src/sys/arch/sgimips/mace/if_mecreg.h
RevisionDateAuthorComments
 1.4  07-Aug-2008  tsutsui - check TX_RING pointer in MEC_INT_STATUS in mec_rxintr() (from OpenBSD)
- preserve the last TX descriptor to avoid wraparound (as per Linux driver)
- check IFQ_IS_EMPTY() on calling mec_start() in mec_intr()
- clear IFF_OACTIVE only if a number of descriptors are freed in mec_txintr()

Seems to fix mec(4) hangup problem (and silent reboot by crime watchdog)
on heavy load. Tested by martin@ and Jorge Acereda Macia on port-sgimips.
(though Jorge still has some problem, but this should have fixed one issue)
 1.3  10-Dec-2005  tsutsui branches: 1.3.24; 1.3.74; 1.3.78; 1.3.80; 1.3.84;
Use 64bit access ops for MEC_PHY_* registers (for consistency).
 1.2  11-Jul-2004  tsutsui branches: 1.2.2; 1.2.14;
Add a working driver for O2 (IP32) on-board MACE MAC-110 Ethernet.

Note:
- I don't have any hardware docments for this device, so this driver might
have some odd descriptions guessed by results of try-and-errors.
(the only info I have is the Linux driver, but I think it doesn't describe
the hardware specifications very well anyway)
- All RX packets and most TX packets are copied from/to buffers in the driver
due to hardware restriction, so performance is not so good for now.
Maybe RX packets can be directly DMA'ed to mbufs by the same method used
of fxp(4), but the hardware seems to require 4kbyte aligned RX buffers.
- Multicast filter setup function is not tested yet (no info).
- Currently only tested on R5000 O2 with disabled L2 cache, so needs
more tests on other CPU (i.e. RM5200/R10000/R12000) models.
- Currently BUS_DMA_COHERENT is not used for the device control data DMA
to avoid performance issue on memcpy() against RX buffers, but it might be
problematic when L2 cache is enabled or on R10000 models.
 1.1  18-Jan-2004  sekiya branches: 1.1.2;
Following the example of the hpc/, gio/, and ioc/ directories, move the
mace devices to their own mace/ directory. Alter conf/files.sgimips to
reflect this change in a sane manner (i.e., pull in dev/files.dev and
mace/files.mace when appropriate).

At the same time, allow crime_intr_establish() to fall through to
mace_intr_establish(). mace devices now call cpu_intr_establish().
 1.1.2.1  15-Jul-2004  tron Pull up revision 1.2 (requested by tsutsui in ticket #652):
Add a working driver for O2 (IP32) on-board MACE MAC-110 Ethernet.
Note:
- I don't have any hardware docments for this device, so this driver might
have some odd descriptions guessed by results of try-and-errors.
(the only info I have is the Linux driver, but I think it doesn't describe
the hardware specifications very well anyway)
- All RX packets and most TX packets are copied from/to buffers in the driver
due to hardware restriction, so performance is not so good for now.
Maybe RX packets can be directly DMA'ed to mbufs by the same method used
of fxp(4), but the hardware seems to require 4kbyte aligned RX buffers.
- Multicast filter setup function is not tested yet (no info).
- Currently only tested on R5000 O2 with disabled L2 cache, so needs
more tests on other CPU (i.e. RM5200/R10000/R12000) models.
- Currently BUS_DMA_COHERENT is not used for the device control data DMA
to avoid performance issue on memcpy() against RX buffers, but it might be
problematic when L2 cache is enabled or on R10000 models.
 1.2.14.1  21-Jun-2006  yamt sync with head.
 1.2.2.5  11-Dec-2005  christos Sync with head.
 1.2.2.4  21-Sep-2004  skrll Fix the sync with head I botched.
 1.2.2.3  18-Sep-2004  skrll Sync with HEAD.
 1.2.2.2  03-Aug-2004  skrll Sync with HEAD
 1.2.2.1  11-Jul-2004  skrll file if_mecreg.h was added on branch ktrace-lwp on 2004-08-03 10:40:07 +0000
 1.3.84.1  19-Oct-2008  haad Sync with HEAD.
 1.3.80.1  18-Sep-2008  wrstuden Sync with wrstuden-revivesa-base-2.
 1.3.78.1  04-May-2009  yamt sync with head.
 1.3.74.1  28-Sep-2008  mjf Sync with HEAD.
 1.3.24.1  05-Nov-2008  snj Pull up following revision(s) (requested by tsutsui in ticket #1221):
sys/arch/sgimips/mace/if_mec.c: revision 1.9
sys/arch/sgimips/mace/if_mec.c: revision 1.12
sys/arch/sgimips/mace/if_mec.c: revision 1.14
sys/arch/sgimips/mace/if_mec.c: revision 1.17
sys/arch/sgimips/mace/if_mec.c: revision 1.18
sys/arch/sgimips/mace/if_mec.c: revision 1.20
sys/arch/sgimips/mace/if_mec.c: revision 1.21 via patch
sys/arch/sgimips/mace/if_mec.c: revision 1.22
sys/arch/sgimips/mace/if_mec.c: revision 1.23
sys/arch/sgimips/mace/if_mec.c: revision 1.24
sys/arch/sgimips/mace/if_mec.c: revision 1.25
sys/arch/sgimips/mace/if_mec.c: revision 1.26 via patch
sys/arch/sgimips/mace/if_mec.c: revision 1.27 via patch
sys/arch/sgimips/mace/if_mec.c: revision 1.28
sys/arch/sgimips/mace/if_mec.c: revision 1.29
sys/arch/sgimips/mace/if_mec.c: revision 1.30 via patch
sys/arch/sgimips/mace/if_mecreg.h: revision 1.4
Accept RX packets which are larger than ETHER_MAX_LEN but can be stored
into RX mbufs.
(BTW, is there any way to allocate RX mbufs aligned at PAGE_SIZE?)
sprinkle delay() and mec_mii_wait() in MII access functions
with this I no longer get spontaneous reboots during network traffic
Fix typo in comments. Mostly from OpenBSD.
- call mec_reset() to make sure DMA stopped (inspired by OpenBSD)
- also stop DMA in mec_reset() before resetting chip
- set MAC address to MAC_STATION reg in mec_attach(), not in mec_reset()
Possibly fixes occasional interrupt storm from mec(4) (i.e. hangup) at boot.
Add a hack to deal with hardware that misses the machine's serial number
for whatever reason - just generate a MAC address from another environemt
variable, so that the admin can adjust it.
Normalize my licenses.
- check TX_RING pointer in MEC_INT_STATUS in mec_rxintr() (from OpenBSD)
- preserve the last TX descriptor to avoid wraparound (as per Linux driver)
- check IFQ_IS_EMPTY() on calling mec_start() in mec_intr()
- clear IFF_OACTIVE only if a number of descriptors are freed in mec_txintr()
Seems to fix mec(4) hangup problem (and silent reboot by crime watchdog)
on heavy load. Tested by martin@ and Jorge Acereda Macia on port-sgimips.
(though Jorge still has some problem, but this should have fixed one issue)
Specify PAGE_SIZE boundary for TX dmamaps.
mec(4) hardware may have the restriction.
The last txdesc is now preserved, so also set IFF_OACTIVE properly.
Use while(cond){} instead of for(;;){if(!cond)break;}.
- no need to set the TXCMD_TXINT bit against the last enqueued TX packet
because TX_EMPTY interrupt is enough to serve it on TX completion
- start TX right after each TX packet has been prepared
A quick ttcp(1) test shows ~5% improvements.
In mec_intr() call mec_init() on errors for workaround.
Don't forget to unload TX dmamap on failure (in !MEC_TXSTAT_SUCCESS case).
Fix a critical botch (inverted test) I put in rev 1.20.
Set MEC_TXCMD_TXINT every MEC_NTXDESC_INTR packets
if more than half txdescs have been queued because
TX_EMPTY interrupts will rarely happen if TX queue is so stacked.
Make sure to free an allocated mbuf on failure path.

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