Fix the machine-dependent ptrace requests to respect LWP number

Fix the machine-dependent ptrace register-related requests (e.g.
PT_GETXMMREGS, PT_GETXSTATE on x86) to correctly respect the LWP number
passed as the data argument. Before this change, these requests
did not operate on the requested LWP of a multithreaded program.

This change required moving ptrace_update_lwp() out of unit scope,
and changing ptrace_machdep_dorequest() function to take a pointer
to pointer as the second argument, consistently with ptrace_regs().

I am planning to extend the ATF ptrace() register tests in the future
to check for regressions in multithreaded programs, as time permits.

Reviewed by kamil.

apply some parens to make macros safe. fixes GCC 9 sanitizer issues.

Introduce PT_LWPSTATUS + PT_LWPNEXT, obsolete PT_LWPINFO

PT_LWPINFO is a legacy ptrace(2) operation that was originally intended
to retrieve the thread (LWP) information inside a traced process.

It has a number of flaws and is confused with PT_LWPINFO from FreeBSD.

PT_LWPSTATUS and PT_LWPNEXT address the problems (shortly by: rename,
removal of pl_event) and introduces new features: signal context
(pl_sigpend, pl_sigmask), LWP name (pl_name), LWP TLS base address
(pl_private). The private pointer was so far missing information for
a debugger.

PT_LWPSTATUS@nnn is now shipped with core(5) files and contain LWP specific
information, so far missed in the core(5) files.

PT_LWPSTATUS retrieves LWP information for the prompted thread.
PT_LWPNEXT retrieves LWP information for the next thread, borrowing the
semantics from NetBSD specific PT_LWPINFO.

PT_LWPINFO is namespaced with __LEGACY_PT_LWPINFO and still available for
the foreseeable future, without plans of removing it.

Add ATF tests for PT_LWPSTATUS + PT_LWPNEXT.

Keep ATF tests for PT_LWPINFO.

Switch GDB to new API.

Proposed on tech-kern@.

Provide PTRACE_ILLEGAL_ASM, using an illegal slot instruction

branches: 1.15.2;
Introduce PTRACE_REG_FP() a helper macro to retrieve the frame pointer

The macro is dummy for ia64 (the FP register is unknown and can change
freely) and sparc/sparc64 (not stored in struct reg).

branches: 1.14.12;
Add new macro PTRACE_BREAKPOINT_ASM in <sys/ptrace.h> MD part

This macro ships with a MD-specific assembly instruction triggering
a software breakpoint.

Missing instruction for powerpc targets.

This code is used in ATF tests (lib/libc/sys/t_ptrace_wait).

Original patch by Nick Hudson, thanks!

Add new ptrace(2) API: PT_SETSTEP & PT_CLEARSTEP

These operations allow to mark thread as a single-stepping one.

This allows to i.a.:
- single step and emit a signal (PT_SETSTEP & PT_CONTINUE)
- single step and trace syscall entry and exit (PT_SETSTEP & PT_SYSCALL)

The former is useful for debuggers like GDB or LLDB. The latter can be used
to singlestep a usermode kernel. These examples don't limit use-cases of
this interface.

Define PT_*STEP only for platforms defining PT_STEP.

Add new ATF tests setstep[1234].

These ptrace(2) operations first appeared in FreeBSD.

Sponsored by <The NetBSD Foundation>

branches: 1.12.2; 1.12.4;
For processors that have memory breakpoints, add macros for them to help
libproc

Provide access to pc/sp/syscall-return registers like we have for mcontext

branches: 1.10.12; 1.10.30;
#if-0'ed defines for PT_GETFPREGS and PT_SETFPREGS. Not used yet, but
reserve the numbers as they are "leaked" to readelf(1), that has to know
them as NT_NETBSDCORE_FIRSTMACH + x (see get_netbsd_elfcore_note_type).

Implement PT_STEP.

branches: 1.8.14; 1.8.20; 1.8.22;
Implement PT___GETREGS40 and PT___SETREGS40 under COMPAT_40 so that
old gdb works on newer kernels.

branches: 1.7.2;
Add r_gbr to struct reg. Provide old definition as struct __reg40.
Rename old PT_GETREG to PT___GETREG40, PT_SETREG to PT___SETREG40.

Oops, make #endif comment properly reflect the test.

Multiple inclusion protection.

branches: 1.4.6; 1.4.10; 1.4.16;
Define PT_MACHDEP_STRINGS

branches: 1.3.12; 1.3.34; 1.3.96; 1.3.102;
Remove #if 0 #endif

branches: 1.2.8;
supports single step!

branches: 1.1.2;
Merge in NetBSD/sh3 from cvs.kame.net repository.

Tree structure:
- sys/arch/sh3: sh3 generic code
As commented, in-chip device drivers are put into sys/arch/sh3/dev.
- sys/arch/evbsh3: sh3 evaluation boards (pure sh3 CPU, no fancy external HW)
- sys/arch/mmeye: Brains mmEye, www.brains.co.jp
MI source code includes couple of #ifdef for sh3-coff support.
(sh3 uses coff or elf)

Needs some more improvements, especialy in sys/arch/sh3/conf/files.sh3,
to compile the tree (due to last minute tree structure change).