Overhaul the API used to fetch and store individual memory cells in
userspace. The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms. The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).

Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.

Welcome to NetBSD 8.99.37.

branches: 1.20.60;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.

Various #include fixes and review by matt@.

Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

branches: 1.18.4;
Rename L_ADDR to L_PCB and amend some comments accordingly.

Add GBR register to switchframe.

While here, reorder switchframe so that we can shave off a few
instructions when restoring it (group stack registers at the end, make
sure that last and first registers are safe to load/store in delay
slots).

Add GBR register to trapframe.

branches: 1.15.2;
Convert TNF licenses to new 2 clause variant

branches: 1.14.2; 1.14.4;
Revert interrupt stack changes. There are some issues and, at least
in the current form, they complicate implementation of fast software
interrupts. I'd rather get fast softints in now and may be revisit
interrupt stack later.

branches: 1.13.16;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.12.10;
Implement fast path TLB miss handling. Walk the page table without
creating a trapframe, with exceptions disabled and using only BANK1
registers. If a valid pte is found, load it and return. Otherwise
create a trapframe and proceed to the full-blown C handler.

branches: 1.11.4;
G/c unused defines/includes.

branches: 1.10.24; 1.10.26; 1.10.30; 1.10.32; 1.10.34; 1.10.36;
merge ktrace-lwp.

branches: 1.9.16;
G/c symbols related to structs proc and mdproc.

branches: 1.8.2;
Rewrite user space access functions which use gcc's "labels as values"
extension in asm to avoid unexpected code omission during optimization
which causes wrong return value on faults.

Merge the nathanw_sa branch.

When delivering a signal, don't push the signum, code, and context pointer,
or handler onto the stack. Instead, just stuff them into the correct
argument registers (handler is a "4th arg").

branches: 1.5.2; 1.5.6;
adapted to pmap and exception code changes.

add uvmexp.intrs++

Rework interrupt code.
+ Fully utilize SH SR.I[0:3] interrupt level.
+ software interrupt is emulated by TMU1, 2 one shot interrupt.
+ implement generic soft interrupts.
+ implement clockframe correctly.

kernel stack fix. old code simply P3 address converted to P1, it
caused memory destruction when kernel stack grow over 1 page. new
code use P3 address for kernel stack. but for the sake of debug, P1
kernel stack mode remain.

branches: 1.1.2; 1.1.8;
Move common exception vector and scheduler code to
sh3/sh3/exception_vector.S and sh3/sh3/locore_subr.S. exception
vectors are installed by sh_cpu_init(). machine/locore.S contains
kernel entry, interrupt handler, and some MD code.