Home | History | Annotate | Download | only in ata
History log of /src/sys/dev/ata/satareg.h
RevisionDateAuthorComments
 1.7  16-Feb-2022  andvar fix various typos, mainly in comments.
 1.6  27-Dec-2020  jmcneill Add G3 and DevSleep definitions. This changes the mask used by
SControl_IPM_NONE from 0x3 to 0x7.
 1.5  28-Apr-2008  martin branches: 1.5.94; 1.5.102;
Remove clause 3 and 4 from TNF licenses
 1.4  11-Dec-2005  christos branches: 1.4.70; 1.4.72; 1.4.74;
merge ktrace-lwp.
 1.3  23-May-2004  wiz branches: 1.3.2;
Fix typo reported by Alexander Yurchenko grange at rt mipt ru in private
mail.
 1.2  17-Dec-2003  thorpej Some additional SATA-II registers.
 1.1  14-Dec-2003  thorpej Serial ATA register definitions.
 1.3.2.4  21-Sep-2004  skrll Fix the sync with head I botched.
 1.3.2.3  18-Sep-2004  skrll Sync with HEAD.
 1.3.2.2  03-Aug-2004  skrll Sync with HEAD
 1.3.2.1  23-May-2004  skrll file satareg.h was added on branch ktrace-lwp on 2004-08-03 10:45:46 +0000
 1.4.74.1  16-May-2008  yamt sync with head.
 1.4.72.1  18-May-2008  yamt sync with head.
 1.4.70.1  02-Jun-2008  mjf Sync with HEAD.
 1.5.102.1  03-Jan-2021  thorpej Sync w/ HEAD.
 1.5.94.1  30-Dec-2020  martin Pull up following revision(s) (requested by jmcneill in ticket #1167):

sys/dev/ic/ahcisata_core.c: revision 1.84
sys/dev/ic/ahcisata_core.c: revision 1.85
sys/dev/ic/ahcisata_core.c: revision 1.88
sys/dev/ic/ahcisata_core.c: revision 1.89
sys/arch/arm/nvidia/tegra_ahcisata.c: revision 1.13
sys/dev/ic/ahcisatavar.h: revision 1.26
sys/dev/ic/ahcisata_core.c: revision 1.90
sys/dev/ic/ahcisata_core.c: revision 1.91
sys/dev/ic/ahcisata_core.c: revision 1.92
sys/dev/ata/satareg.h: revision 1.6

ahci_exec_fis: wait for the correct amount of time when AT_WAIT is set

Retry clearing WDCTL_RST a few times before giving up. Makes SATA work in
Solidrun Honeycomb LX2K.

AHCI 1.3.1 specification says that it is good practice for system software
to 'zero-out' the memory allocated and referenced by PxCLB and PxFB.

ahci_intr: use ffs in the port bitmask instead of looping over all 32 bits

AHCI 1.3.1 section 5.5.3 "Processing Completed Commands" says that we
should clear PxIS before IS.IPS.

Add G3 and DevSleep definitions. This changes the mask used by
SControl_IPM_NONE from 0x3 to 0x7.

Make sure to ack IS after PxIS when polling and when using multiple MSI-X
messages.

Remove the AHCI_QUIRK_SKIP_RESET quirk now that the underlying issue is
fixed.

RSS XML Feed