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History log of /src/sys/dev/pci/piixpmreg.h
RevisionDateAuthorComments
 1.13  10-Jan-2023  msaitoh Use MMIO for PM register access on newer revision's devices.

Newer revision's device only support memory mapped access. At least,
X670E's SMBus device that the revision ID is 0x71 doesn't support I/O
access. Use MMIO access for newer devices. Linux uses >= 0x51 for the
check, so we do the same check. Note that X570's SMBus(rev. 0x61) supports
I/O access...
 1.12  14-Jan-2020  msaitoh branches: 1.12.24;
Add AMDFCH41_SMBUS_PORTMASK.
 1.11  09-Jan-2020  msaitoh Acquire/release host semaphore to share SMBus between the host and
the embedded controller (IMC).

Without this change, "shutdown -r" does power off and not boot on ECS HDC-I2.
This change fixes the problem.
 1.10  24-Dec-2019  msaitoh branches: 1.10.2;
Don't force using SMBUS0SEL register.

- Use it depending on USE_SMBUS0SEL bit.
- If we use SMBUS0EN_LO register to select the port, update the port
select bits only.
 1.9  23-Dec-2019  msaitoh - Read SB800_SMB_HOSTC correctly. This register is not in the PCI config space
but in the I/O space.
- The bit 0 of SB800_SMB_HOSTC is 0 on SMI or 1 on IRQ, so invert the check.
- Modify comment.
- Whitespace fix.
 1.8  13-Jul-2019  msaitoh branches: 1.8.2;
Improve SB800 and newer chipsets support:
- Add newer chipset (e.g. X370/X399 and newer) support that the PCI device id
is 0x790b. The register definitions are mainly taken from FreeBSD.
- Rename PIIXPM_INDIRECTIO_* to SB800_INDIRECTIO_* because those are only
for SB800 and newer chipsets.
- SB800 also support 4 ports.
- SB800's interrupt configuration bit is different from others.
Use SB800_SMB_HOSTC's bit 0.
- Do not bus_space_map devices which are at address 0 (it's uninitialized)
in piixpm_attach().
- Add the port number to the dmesg output.
- Avoid uninitiliazed use of ctl and corresponding warnings. From OpenBSD rev.
1.38
 1.7  18-Mar-2014  riastradh branches: 1.7.22; 1.7.30;
Merge riastradh-drm2 to HEAD.
 1.6  22-Jul-2013  soren The SB800 SMBus controller has four selectable SDA lines.
Expose them as four iic busses.
 1.5  13-Feb-2011  hannken branches: 1.5.4; 1.5.10; 1.5.14; 1.5.18; 1.5.26;
The ServerWorks CSB5 smbus controller often times out and hangs until reboot.

Increase the delay between setting the command register and reading the
status register. Reset the smbus controller if it has timed out.

Tested on an IBM eServer x335.
 1.4  26-Jun-2006  drochner branches: 1.4.6; 1.4.84; 1.4.90; 1.4.92;
oops, need to commit the register definition for PM mapping too
 1.3  22-Jun-2006  jmcneill Add timecounter support for Intel PIIX Power Management Controllers.

Ok kardel@.
 1.2  17-Jun-2006  jmcneill branches: 1.2.2;
Restore the device activity PCI configuration registers on resume.
 1.1  07-May-2006  jmcneill branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.12;
Add support for the Intel PIIX4 power management controller, from OpenBSD.
 1.1.12.1  13-Jul-2006  gdamore Merge from HEAD.
 1.1.10.2  01-Jun-2006  kardel Sync with head.
 1.1.10.1  07-May-2006  kardel file piixpmreg.h was added on branch simonb-timecounters on 2006-06-01 22:36:49 +0000
 1.1.8.2  24-May-2006  tron Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.
 1.1.8.1  07-May-2006  tron file piixpmreg.h was added on branch peter-altq on 2006-05-24 15:50:28 +0000
 1.1.6.4  11-Aug-2006  yamt sync with head
 1.1.6.3  26-Jun-2006  yamt sync with head.
 1.1.6.2  24-May-2006  yamt sync with head.
 1.1.6.1  07-May-2006  yamt file piixpmreg.h was added on branch yamt-pdpolicy on 2006-05-24 10:58:01 +0000
 1.1.4.1  19-Jun-2006  chap Sync with head.
 1.1.2.2  11-May-2006  elad sync with head
 1.1.2.1  07-May-2006  elad file piixpmreg.h was added on branch elad-kernelauth on 2006-05-11 23:28:48 +0000
 1.2.2.3  30-Dec-2006  yamt sync with head.
 1.2.2.2  21-Jun-2006  yamt sync with head.
 1.2.2.1  17-Jun-2006  yamt file piixpmreg.h was added on branch yamt-lazymbuf on 2006-06-21 15:05:06 +0000
 1.4.92.1  17-Feb-2011  bouyer Sync with HEAD
 1.4.90.1  06-Jun-2011  jruoho Sync with HEAD.
 1.4.84.1  05-Mar-2011  rmind sync with head
 1.4.6.2  09-Sep-2006  rpaulo sync with head
 1.4.6.1  26-Jun-2006  rpaulo file piixpmreg.h was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:52:19 +0000
 1.5.26.1  23-Jul-2013  riastradh sync with HEAD
 1.5.18.1  28-Aug-2013  rmind sync with head
 1.5.14.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.5.10.1  20-Sep-2013  riz Pull up following revision(s) (requested by fair in ticket #936):
sys/dev/pci/piixpmreg.h: revision 1.6
sys/dev/pci/piixpm.c: revision 1.42
The SB800 SMBus controller has four selectable SDA lines.
Expose them as four iic busses.
 1.5.4.1  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.7.30.1  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.7.22.3  23-Jan-2023  martin Pull up the following revisions, requested by msaitoh in ticket #1790:

sys/dev/pci/piixpm.c 1.66,1.68-1.72 via patch
sys/dev/pci/piixpmreg.h 1.13

Add support new AMD chipsets that do not have indirect access
I/O ports.
 1.7.22.2  05-Aug-2020  martin Pull up the following revisions, requested by msaitoh in ticket #1591:

sys/dev/pci/piixpm.c 1.57-1.59,
1.61-1.63 via patch
sys/dev/pci/piixpmreg.h 1.9-1.12

- Fix number of port for Hudson rev. 0x1f and newer.
- Read SB800_SMB_HOSTC correctly. This register is not in the PCI
config space but in the I/O space.
- The bit 0 of SB800_SMB_HOSTC is 0 on SMI or 1 on IRQ, so invert the
check.
- Don't force using SMBUS0SEL register.
- Acquire/release host semaphore to share SMBus between the host and
the embedded controller (IMC). Without this change, "shutdown -r"
does power off and not boot on some machines.
- Save/restore port number before selecting port.
- Modify comment.
- Whitespace fix.
 1.7.22.1  06-Aug-2019  martin Pull up following revision(s) (requested by msaitoh in ticket #1327):

sys/dev/pci/piixpmreg.h: revision 1.8
sys/dev/pci/piixpm.c: revision 1.53
sys/dev/pci/piixpm.c: revision 1.54

Sync with OpenBSD's piixpm.c up to rev. 1.35:
- Print "polling" correctly when in the attach function. Same as OpenBSD
rev. 1.22-23.
- Improve debug printf()'s. Part of OpenBSD 1.24.
- Do not bus_space_map devices which are at address 0 (it's uninitialized).
Same as OpenBSD rev. 1.25.
- Add ServerWorks HT1100 device from OpenBSD. Same as OpenBSD rev. 1.32
- Use unique wait channel. From OpenBSD rev. 1.35


Improve SB800 and newer chipsets support:
- Add newer chipset (e.g. X370/X399 and newer) support that the PCI device id
is 0x790b. The register definitions are mainly taken from FreeBSD.
- Rename PIIXPM_INDIRECTIO_* to SB800_INDIRECTIO_* because those are only
for SB800 and newer chipsets.
- SB800 also support 4 ports.
- SB800's interrupt configuration bit is different from others.
Use SB800_SMB_HOSTC's bit 0.
- Do not bus_space_map devices which are at address 0 (it's uninitialized)
in piixpm_attach().
- Add the port number to the dmesg output.
- Avoid uninitiliazed use of ctl and corresponding warnings. From OpenBSD rev.
1.38
 1.8.2.2  23-Jan-2023  martin Pull up the following revisions, requested by msaitoh in ticket #1573:

sys/dev/pci/piixpm.c 1.66,1.68-1.72 via patch
sys/dev/pci/piixpmreg.h 1.13

Add support new AMD chipsets that do not have indirect access
I/O ports.
 1.8.2.1  16-Jul-2020  martin Pull up the following revisions, requested by msaitoh in ticket #1017:

sys/dev/pci/piixpm.c 1.57-1.59, 1.61-1.63 via patch
sys/dev/pci/piixpmreg.h 1.9-1.12

- Fix number of port for Hudson rev. 0x1f and newer.
- Read SB800_SMB_HOSTC correctly. This register is not in the PCI
config space but in the I/O space.
- The bit 0 of SB800_SMB_HOSTC is 0 on SMI and 1 on IRQ, so invert the
check.
- Don't force using SMBUS0SEL register.
- Acquire/release host semaphore to share SMBus between the host and
the embedded controller (IMC). Without this change, "shutdown -r"
does power off and not boot on some machines.
- Save/restore port number before selecting port.
- Modify comment.
- Whitespace fix.
 1.10.2.1  17-Jan-2020  ad Sync with head.
 1.12.24.1  23-Jan-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #55):

sys/dev/pci/piixpm.c: revision 1.68
sys/dev/pci/piixpm.c: revision 1.69
sys/dev/pci/piixpmreg.h: revision 1.13
sys/dev/pci/piixpm.c: revision 1.70
sys/dev/pci/piixpm.c: revision 1.71
sys/dev/pci/piixpm.c: revision 1.72

Modify comment. Whitespace. No functional change.

Simplify and modify for following MMIO support. No functional change.
Modify for following MMIO support. No functional change.

Use MMIO for PM register access on newer revision's devices.
Newer revision's device only support memory mapped access. At least,
X670E's SMBus device that the revision ID is 0x71 doesn't support I/O
access. Use MMIO access for newer devices. Linux uses >= 0x51 for the
check, so we do the same check. Note that X570's SMBus(rev. 0x61) supports
I/O access...

Modify error message to match the current behavior.

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