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History log of /src/sys/dev/sdmmc/sdmmcreg.h
RevisionDateAuthorComments
 1.35  18-Oct-2024  jmcneill sdmmc: Add support for SD card caches.

SD physical 6.0 specification introduced Application Performance Class 2
(A2), which adds support for drive caches and command queueing.

Add support for enabling and flushing the cache when this feature is
present.
 1.34  19-Apr-2018  christos branches: 1.34.34; 1.34.40;
s/static inline/static __inline/g for consistency.
 1.33  12-Sep-2017  jmcneill branches: 1.33.2;
For SD cards, send the SET_WR_BLK_ERASE_COUNT app command before a
multi-block write to improve write performance.
 1.32  16-Jul-2017  jmcneill branches: 1.32.2;
Add support for eMMC 4.5's optional cache feature. If a cache is present,
and the host controller reports the SMC_CAPS_POLLING capability (needed
to flush cache at shutdown), it will be automatically enabled and used.
 1.31  24-Jun-2017  jmcneill Read SD status register and print card status when a new SD card is found:

sdmmc0: SD card status: 4-bit, C10, U1, V10

If the SD status register reports discard support, set the DISCARD arg to
the ERASE operation to let the card know that the host doesn't care if the
erase is performed.
 1.30  24-Jun-2017  jmcneill Add discard support to ld@sdmmc using the ERASE (CMD38) command.
 1.29  17-Feb-2017  nonaka branches: 1.29.6;
sdhc(4): hardware reset support for Intel eMMC controller
 1.28  17-Feb-2017  nonaka sdmmc(4): Added EXT_CSD[HS_TIMING] definitions.
 1.27  17-Feb-2017  nonaka sdmmc(4): Change EXT_CSD[CARD_TYPE] HS DDR 52 MHz definition.

Because it has been difficult to understand from the definition is DDR.
 1.26  17-Feb-2017  nonaka sdmmc(4): Remove unused EXT_CSD[CARD_TYPE] definitions.
 1.25  17-Feb-2017  nonaka sdmmc(4): Added comments at EXT_CSD[CARD_TYPE] definitions.
 1.24  17-Feb-2017  nonaka sdmmc(4): Added 4 and 8 bit mode DDR definitions at EXT_CSD[BUS_WIDTH].
 1.23  17-Feb-2017  nonaka sdmmc(4): Fix cell type in comments.

From JEDEC Standard No.84-B51, 7.4. Extended CSD register.
 1.22  10-Aug-2016  nonaka branches: 1.22.2;
Use 1.65-1.95 voltage window for 1.8V support.
 1.21  29-Oct-2015  jmcneill branches: 1.21.2;
After setting HS_TIMING value for HS200 or later, send repeated SEND_STATUS
command until the device is no longer busy or the SWITCH_ERROR bit is set.
 1.20  08-Aug-2015  jmcneill eMMC fixes
 1.19  05-Aug-2015  jmcneill Add support for sampling clock tuning, required for some UHS modes and
MMC HS200.
 1.18  03-Aug-2015  jmcneill Add support for DDR50 transfer modes.
 1.17  02-Aug-2015  jmcneill Add support for eMMC 5.0 HS200 timings.
 1.16  02-Aug-2015  jmcneill Add basic UHS-I support. SDR50 and SDR104 are supported, but not DDR50.
 1.15  07-Dec-2014  jmcneill Fix high capacity (> 2GB) eMMC support, from OpenBSD.
 1.14  03-May-2013  matt branches: 1.14.12;
Add support for the valid card types in eMMC v4.4 (needed by beaglebone
black).
 1.13  15-Dec-2012  jakllsch Correctly read the 512-bit-wide big-endian Switch Function Status register.
Some of this could/will also be useful for the SD Status register.
 1.12  28-Jul-2012  matt branches: 1.12.2;
Fix comments about __bitfield.
 1.11  23-Jul-2012  matt Responses are actually in host order (except SCR which is return in
big endian so that's convert to host order).
 1.10  20-Jul-2012  matt Add use of watermark register when PIO to an ESDHC. After every kill or
drain of watermask words, pause a bit to give time for the fifo to recover.
Always the command response in BE byteorder. Rewrite __bitfield to deal
with this.
 1.9  12-Jul-2012  jakllsch Add SD_STATUS (ACMD13) opcode.
 1.8  27-Jan-2012  matt branches: 1.8.2;
Remove suplurfious ++
 1.7  13-Feb-2011  nonaka branches: 1.7.4; 1.7.8;
use MMC_CSD_CSDVER_EXT_CSD.
 1.6  13-Feb-2011  nonaka - Don't switch MMC high-speed timing, if host controller isn't supported.
- Only check EXT_CSD STRUCTURE version when CSD version is 3.
- initialize width at sdmmc_function_alloc().
 1.5  07-Oct-2010  kiyohara branches: 1.5.2; 1.5.4;
Support High-Speed mode.
 1.4  06-Apr-2010  nonaka branches: 1.4.2;
- mention MMC SPI mode.
- support SD 4bit bus width mode.
 1.3  26-Apr-2009  nonaka branches: 1.3.2; 1.3.4; 1.3.6; 1.3.8; 1.3.10; 1.3.12;
fix build broken.
Pointed by Takeshi Nakayama.
 1.2  26-Apr-2009  nonaka Added some command definitions.
 1.1  21-Apr-2009  nonaka Added SD/MMC support from OpenBSD.
tested on i386, amd64 at current-users ML by pgoyette@.
tested on zaurus by myself.
 1.3.12.2  05-Mar-2011  rmind sync with head
 1.3.12.1  30-May-2010  rmind sync with head
 1.3.10.2  22-Oct-2010  uebayasi Sync with HEAD (-D20101022).
 1.3.10.1  30-Apr-2010  uebayasi Sync with HEAD.
 1.3.8.2  07-Oct-2009  sborrill Pull up the following revisions(s) (requested by jmcneill in ticket #1044):
distrib/sets/lists/man/mi: patch
share/man/man4/Makefile: patch
sys/arch/amd64/conf/files.amd64: 1.67
sys/arch/i386/conf/files.i386: 1.349
sys/conf/files 1.945
share/man/man4/sdmmc.4: 1.1-1.4
sys/dev/sdmmc/Makefile.sdmmcdevs 1.1
sys/dev/sdmmc/devlist2h.awk 1.1
sys/dev/sdmmc/files.sdmmc 1.1-1.2
sys/dev/sdmmc/ld_sdmmc.c 1.1-1.3
sys/dev/sdmmc/sbt.c 1.1-1.2
sys/dev/sdmmc/sdhc.c 1.1-1.3
sys/dev/sdmmc/sdhcreg.h 1.1
sys/dev/sdmmc/sdhcvar.h 1.1
sys/dev/sdmmc/sdmmc.c 1.1
sys/dev/sdmmc/sdmmc_cis.c 1.1
sys/dev/sdmmc/sdmmc_io.c 1.1
sys/dev/sdmmc/sdmmc_ioreg.h 1.1
sys/dev/sdmmc/sdmmc_mem.c 1.1-1.2
sys/dev/sdmmc/sdmmcchip.h 1.1
sys/dev/sdmmc/sdmmcdevs 1.1
sys/dev/sdmmc/sdmmcdevs.h 1.1-1.2
sys/dev/sdmmc/sdmmcreg.h 1.1-1.3
sys/dev/sdmmc/sdmmcvar.h 1.1

Add sdmmc framework
 1.3.8.1  26-Apr-2009  sborrill file sdmmcreg.h was added on branch netbsd-5 on 2009-10-07 15:41:13 +0000
 1.3.6.2  13-May-2009  jym Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.
 1.3.6.1  26-Apr-2009  jym file sdmmcreg.h was added on branch jym-xensuspend on 2009-05-13 17:21:29 +0000
 1.3.4.4  09-Oct-2010  yamt sync with head
 1.3.4.3  11-Aug-2010  yamt sync with head.
 1.3.4.2  04-May-2009  yamt sync with head.
 1.3.4.1  26-Apr-2009  yamt file sdmmcreg.h was added on branch yamt-nfs-mp on 2009-05-04 08:13:18 +0000
 1.3.2.2  28-Apr-2009  skrll Sync with HEAD.
 1.3.2.1  26-Apr-2009  skrll file sdmmcreg.h was added on branch nick-hppapmap on 2009-04-28 07:36:34 +0000
 1.4.2.2  21-Apr-2010  matt sync to netbsd-5
 1.4.2.1  06-Apr-2010  matt file sdmmcreg.h was added on branch matt-nb5-mips64 on 2010-04-21 00:27:52 +0000
 1.5.4.1  17-Feb-2011  bouyer Sync with HEAD
 1.5.2.1  06-Jun-2011  jruoho Sync with HEAD.
 1.7.8.1  18-Feb-2012  mrg merge to -current.
 1.7.4.4  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.7.4.3  23-Jan-2013  yamt sync with head
 1.7.4.2  30-Oct-2012  yamt sync with head
 1.7.4.1  17-Apr-2012  yamt sync with head
 1.8.2.1  08-Aug-2012  jdc Pull up revisions:
src/sys/dev/sdmmc/sdhc.c revisions 1.16,1.20,1.21,1.22,1.23 via patch,1.25
src/sys/dev/sdmmc/sdhcreg.h revision 1.8
src/sys/dev/sdmmc/sdmmc_mem.c revisions 1.21,1.22
src/sys/dev/sdmmc/sdmmcreg.h revisions 1.10,1.11,1.12
(requested by matt in ticket 441).

SDHCI byte swaps the BE response on the wire into LE registers.
As we always want response data in LE, use bus_space_read_stream.
Additonally, read response data in 1 or 4 4-byte chunks, instead of
one 4-byte chunk or 15 1-byte chunks.

bus_space_*_stream_N() functions are not universally available.
Provite alternate implementation for when they are unavailable.

Handle interrupt acknowledgement in the SDHC_FLAG_32BIT_ACCESS case in
the same way as non-SDHC_FLAG_32BIT_ACCESS case.

If there was an error in 32-bit mode, just set ERROR_INTERRUPT otherwise
see if matched anything we care about.

Add use of watermark register when PIO to an ESDHC. After every kill or
drain of watermask words, pause a bit to give time for the fifo to recover.
Always the command response in BE byteorder. Rewrite __bitfield to deal
with this.

Responses are actually in host order (except SCR which is return in
big endian so that's convert to host order).

Fix comments about __bitfield.
 1.12.2.3  03-Dec-2017  jdolecek update from HEAD
 1.12.2.2  23-Jun-2013  tls resync from head
 1.12.2.1  25-Feb-2013  tls resync with head
 1.14.12.5  28-Aug-2017  skrll Sync with HEAD
 1.14.12.4  05-Oct-2016  skrll Sync with HEAD
 1.14.12.3  27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.14.12.2  22-Sep-2015  skrll Sync with HEAD
 1.14.12.1  06-Apr-2015  skrll Sync with HEAD
 1.21.2.1  20-Mar-2017  pgoyette Sync with HEAD
 1.22.2.1  21-Apr-2017  bouyer Sync with HEAD
 1.29.6.2  25-Jul-2017  snj Pull up following revision(s) (requested by jmcneill in ticket #139):
sys/arch/arm/sunxi/sunxi_mmc.c: revision 1.2
sys/dev/sdmmc/ld_sdmmc.c: revision 1.31
sys/dev/sdmmc/sdmmc_mem.c: revision 1.61
sys/dev/sdmmc/sdmmcreg.h: revision 1.32
sys/dev/sdmmc/sdmmcvar.h: revision 1.28
Add support for eMMC 4.5's optional cache feature. If a cache is present,
and the host controller reports the SMC_CAPS_POLLING capability (needed
to flush cache at shutdown), it will be automatically enabled and used.
--
Add SMC_CAPS_POLLING support.
 1.29.6.1  01-Jul-2017  snj Pull up following revision(s) (requested by jmcneill in ticket #67):
sys/dev/sdmmc/ld_sdmmc.c: 1.28
sys/dev/sdmmc/sdmmc_mem.c: 1.58-1.60
sys/dev/sdmmc/sdmmcreg.h: 1.30, 1.31
sys/dev/sdmmc/sdmmcvar.h: 1.25-1.27
Add discard support to ld@sdmmc using the ERASE (CMD38) command.
--
Read SD status register and print card status when a new SD card is found:
sdmmc0: SD card status: 4-bit, C10, U1, V10
If the SD status register reports discard support, set the DISCARD arg to
the ERASE operation to let the card know that the host doesn't care if the
erase is performed.
--
Revert part of previous; the SD card spec recommends not to issue a DISCARD
command to the file system area.
 1.32.2.2  16-Jul-2017  jmcneill 2978427
 1.32.2.1  16-Jul-2017  jmcneill file sdmmcreg.h was added on branch perseant-stdc-iso10646 on 2017-07-16 17:11:47 +0000
 1.33.2.1  22-Apr-2018  pgoyette Sync with HEAD
 1.34.40.1  02-Aug-2025  perseant Sync with HEAD
 1.34.34.1  26-Oct-2024  martin Pull up following revision(s) (requested by jmcneill in ticket #985):

sys/dev/sdmmc/sdmmcvar.h: revision 1.37
sys/dev/sdmmc/sdmmcreg.h: revision 1.35
sys/dev/sdmmc/ld_sdmmc.c: revision 1.44
sys/dev/sdmmc/sdmmc_mem.c: revision 1.76

sdmmc: Add support for SD card caches.

SD physical 6.0 specification introduced Application Performance Class 2
(A2), which adds support for drive caches and command queueing.

Add support for enabling and flushing the cache when this feature is
present.

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