Home | History | Annotate | Download | only in cpuctl
History log of /src/usr.sbin/cpuctl/cpuctl.c
RevisionDateAuthorComments
 1.35  13-Sep-2023  wiz tabify
 1.34  12-Sep-2023  wiz cpuctl: be more verbose about problems and diagnosing them
 1.33  06-Mar-2023  kre Unless -v is given, ignore EEXIST errors from the IOC_CPU_UCODE_APPLY ioctl()
used to implement "cpuctl ucode N", which indicates that the microcode
to be loaded already exists in the CPU, and as such, isn't really a
very interesting "error".
 1.32  01-Feb-2022  mrg branches: 1.32.2;
allow "cpuN" as well as "N" to specific a CPU.

update usage to include a change i made from 2015 to allow multiple
CPUs to be operated on at the same time for most commands.
 1.31  21-Apr-2020  msaitoh Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.

- If the max CPUID leaf is >= 0x15, take TSC value from CPUID. Some processors
can take TSC/core crystal clock ratio but core crystal clock frequency
can't be taken. Intel SDM give us the values for some processors.
- It also required to change lapic_per_second to make LAPIC timer correctly.
- Add new file x86/x86/identcpu_subr.c to share common subroutines between
kernel and userland. Some code in x86/x86/identcpu.c and cpuctl/arch/i386.c
will be moved to this file in future.
- Add comment to clarify.
 1.30  11-May-2019  maxv branches: 1.30.2;
Check the return value of cpuset_set(), to prevent future surprises.
 1.29  16-Jan-2018  mrg branches: 1.29.4;
implement cpuctl identify for sparc and sparc64.

sparc:
- move enum vactype and struct cacheinfo into cpu.h
- move the cache flags from cpuinfo.flags into CACHEINFO.c_flags
(this allows the new cache_printf_backend() to see them.)
remove unused CPUFLG_CACHEIOMMUTABLES and CPUFLG_CACHEDVMA.
- align xmpsg to 64 bytes
- move cache_print() into cache_print.h so it can be shared with
cpuctl. it only depends upon a working printf().
- if found, store the CPU node's "name" into cpu_longname. this
changes the default output to show the local CPU not the
generic CPU family. eg:
cpu0 at mainbus0: mid 8: Ross,RT625 @ 90 MHz, on-chip FPU
vs the generic "RT620/625" previously shown.
- for each CPU export these things:
- name
- fpuname
- mid
- cloc
- freq
- psr impl and version
- mmu impl, version, and number of contexts
- cacheinfo structure (which changed for the first time ever
with this commit.)

sparc64:
- add a minimal "cacheinfo" structure to export the i/d/e-cache
size and linesize.
- store %ver, cpu node "name" and cacheinfo in cpu_info.
- set cpu_info ver, name and cacheinfo in cpu_attach(), and
export them via sysctl, as well as CPU ID and clock freq

cpuctl:
- add identifycpu_bind() that returns false on !x86 as their
identify routines do not need to run on a particular CPU to
obtain its information, and use it to avoid trying to set
affinity when not needed.
- add sparc and sparc64 cpu identify support using the newly
exported values.
 1.28  16-Nov-2015  mrg branches: 1.28.8;
allow most commands to specify more than one cpu. now you can online or
offline (or identify, or intr/nointr) a list of cpus all together.
 1.27  16-Nov-2015  mrg convert getcpuid() to take char* not char**
 1.26  16-Nov-2015  mrg use stdbool.h
 1.25  16-Dec-2014  msaitoh Fix a bug that an unknown command is printed as "(null)".
Reported by Fredrik Pettai.
 1.24  20-Nov-2014  msaitoh Fix manual and usage bug. The ucode command can take [cpuno] argument.
 1.23  23-Dec-2013  msaitoh branches: 1.23.4;
Add verbose flag.
On x86 cpu, cpuctl -v identify dumps the return values of the cpuid
functions. The max levels are taken from CPUID 0 and CPUID 8000_0000.
It's useful for the future CPU.
 1.22  31-Jan-2013  matt Only complain about binding if we have more than 1 cpu. :)
(we always have more than 0).
 1.21  29-Aug-2012  drochner branches: 1.21.2;
Extend the CPU microcode update framework to support Intel x86 CPUs.
Contrary to the AMD implementation, it doesn't use xcalls to distribute
the update to all CPUs but relies on cpuctl(8) to bind itself to the
right CPU -- to keep it simple and avoid possible problems with
hyperthreading.
Also, it doesn't parse the vendor supplied file to pick the right
part for the present CPU model but relies on userland to prepare
files with specific filenames. I'll commit a pkg for this in a minute
(pkgsrc/sysutils/intel-microcode).
The ioctl interface changed; compatibility is provided (should be
limited to COMPAT_NETBSD6 as soon as this is available).
 1.20  13-Jan-2012  cegger branches: 1.20.2;
Support CPU microcode loading via cpuctl(8).
Implemented and enabled via CPU_UCODE kernel config option
for x86 and Xen Dom0.
Tested on different AMD machines with different
CPU families.

ok wiz@ for the manpages
ok releng@
ok core@ via releng@
 1.19  27-Sep-2011  jruoho branches: 1.19.2;
Define _PATH_CPUCTL.
 1.18  26-Sep-2011  jruoho Fix wrong err(3) message (no such thing as IOC_CPU_GETINFO).
 1.17  11-Sep-2011  jdc Add a cs_hwid field to cpustate and use this to store the ci_cpuid (hardware
ID). Report this as the HwID in cpuctl.
OK jruoho@.
 1.16  27-Aug-2011  joerg static + __dead
 1.15  23-Apr-2009  lukem Fix -Wsign-compare issue
 1.14  19-Apr-2009  ad cpuctl:

- Add interrupt shielding (direct hardware interrupts away from the
specified CPUs). Not documented just yet but will be soon.

- Redo /dev/cpu time_t compat so no kernel changes are needed.

x86:

- Make intr_establish, intr_disestablish safe to use when !cold.

- Distribute hardware interrupts among the CPUs, instead of directing
everything to the boot CPU.

- Add MD code for interrupt sheilding. This works in most cases but there is
a bug where delivery is not accepted by an LAPIC after redistribution. It
also needs re-balancing to make things fair after interrupts are turned
back on for a CPU.
 1.13  28-Jan-2009  ad branches: 1.13.2;
cpuctl list: map hardware id after getting state. avoids screwed up display
when ci_cpuid != cpu_index()
 1.12  19-Nov-2008  cegger redo previous:
check ID in getcpuid(). This way, the other commands (online/offline)
tell the user the real error.
 1.11  19-Nov-2008  rmind cpu_identify: check ID against number of processors.
Fix for PR/39955.
 1.10  15-Oct-2008  ad branches: 1.10.2;
Cosmetic change to previous.
 1.9  15-Oct-2008  ad Don't map cpu index to hardware id.
 1.8  16-Jun-2008  rmind - Add general cpuset macros.
- Use kcpuset name for kernel-only functions.
- Use cpuid_t to specify CPU ID.
- Unify all cpuset users.

API is expected to be stable now.
 1.7  16-Jun-2008  rmind Sync with the latest cpuset changes.
 1.6  12-May-2008  ad Clarify output of 'id' column.
 1.5  05-May-2008  ad branches: 1.5.2;
PR port-amd64/37461 x86 cpu dmesg output is noisy

Port identifycpu() to userspace. The kernel lies and reports on cpuN while
actually using the values from cpu0, but this attempts to bind itself to the
requested CPU if running as root. That doesn't work properly yet due to
kern/38588, but will do once that's fixed.
 1.4  28-Apr-2008  martin Remove clause 3 and 4 from TNF licenses
 1.3  25-Mar-2008  martin branches: 1.3.2;
Use cpu index instead of ID for cpuctl; extend listing to provide both
numbers (but now the ID is only informational).
 1.2  09-Jan-2008  tnn improve usage()
 1.1  04-Aug-2007  ad branches: 1.1.2; 1.1.6;
Add cpuctl(8). For now this is not much more than a toy for debugging and
benchmarking that allows taking CPUs online/offline.
 1.1.6.2  04-Aug-2007  ad Add cpuctl(8). For now this is not much more than a toy for debugging and
benchmarking that allows taking CPUs online/offline.
 1.1.6.1  04-Aug-2007  ad file cpuctl.c was added on branch matt-mips64 on 2007-08-04 11:03:06 +0000
 1.1.2.1  23-Mar-2008  matt sync with HEAD
 1.3.2.2  17-Jun-2008  yamt sync with head.
 1.3.2.1  18-May-2008  yamt sync with head.
 1.5.2.1  23-Jun-2008  wrstuden Sync w/ -current. 34 merge conflicts to follow.
 1.10.2.3  06-Feb-2009  snj Pull up following revision(s) (requested by rmind in ticket #409):
usr.sbin/cpuctl/cpuctl.c: revision 1.13
cpuctl list: map hardware id after getting state. avoids screwed up display
when ci_cpuid != cpu_index()
 1.10.2.2  22-Nov-2008  snj Pull up following revision(s) (requested by cegger in ticket #105):
usr.sbin/cpuctl/cpuctl.c: revision 1.12
redo previous:
check ID in getcpuid(). This way, the other commands (online/offline)
tell the user the real error.
 1.10.2.1  22-Nov-2008  snj Pull up following revision(s) (requested by cegger in ticket #105):
usr.sbin/cpuctl/cpuctl.c: revision 1.11
cpu_identify: check ID against number of processors.
Fix for PR/39955.
 1.13.2.1  13-May-2009  jym Sync with HEAD.

Third (and last) commit. See http://mail-index.netbsd.org/source-changes/2009/05/13/msg221222.html
 1.19.2.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.19.2.2  30-Oct-2012  yamt sync with head
 1.19.2.1  17-Apr-2012  yamt sync with head
 1.20.2.1  16-Jan-2015  snj Pull up following revision(s) (requested by msaitoh in ticket #1230):
usr.sbin/cpuctl/cpuctl.8: revisions 1.9-1.12
usr.sbin/cpuctl/cpuctl.c: revisions 1.22-1.23 and 1.25 via patch
usr.sbin/cpuctl/cpuctl.h: revision 1.5 via patch
usr.sbin/cpuctl/arch/cpuctl_i386.h: revisions 1.1-1.2
usr.sbin/cpuctl/arch/i386-asm.S: revisions 1.2-1.3
usr.sbin/cpuctl/arch/i386.c: revisions 1.34, 1.36-1.49, 1.51-1.63 via patch
usr.sbin/cpuctl/arch/x86_64-asm.S: revisions 1.3-1.4
Update cpuctl(8). Microcode and ARM related changes are not included:
- Change the i386 asm x86_identify() so it returns a value instead of
writing into global data. Fix a stack alignment fubar that would
cause a crash on a cirix 486. Refactor identify code to common setup
for normal identify and ucode identify - which was missing a
memset().
- The Intel and AMD docs (more or less) agree on how the cpuid
'extended family' and 'extended model' bits are used to create
larger values than the original 16bit value allowed for.
Calculate and save these values 'up-front' and use them throughout.
Untangle the (backwards) nested switch statement for amd 'model 15'
cpus.
- Use full model number to index name strings - a lot of 256 element
arrays don't matter in usespace.
- Add support for the xsave related data from cpuid 8.n.
Reorder the output so that the 'brand' string - which actually
identifies the cpu is output first.
- Only complain about binding if we have more than 1 cpu.
- Check cpuid leaf 4 for newer Intel CPU to know the cache information.
- Support prefetch size.
- Print the highest extended info level as the basic info level.
- Update URL of AMD's web page.
- Add code to detect hypervisor. The code was based from FreeBSD and
ported by Kengo Nakahara.
- Add verbose flag.
- Add newline if ci_tsc_freq is 0 to not to break the output.
- Update Intel's processor family names and models.
- Print some more bits.
- Add shared TLB
- Add prototypes.
- Add comments.
- Make some functions static.
- Sort functions.
- KNF.
 1.21.2.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.21.2.1  25-Feb-2013  tls resync with head
 1.23.4.1  21-Dec-2014  snj Pull up following revision(s) (requested by msaitoh in ticket #336):
usr.sbin/cpuctl/cpuctl.c: revision 1.25
Fix a bug that an unknown command is printed as "(null)".
Reported by Fredrik Pettai.
 1.28.8.3  23-Aug-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #1892):

usr.sbin/cpuctl/cpuctl.8: revision 1.21
usr.sbin/cpuctl/cpuctl.c: revision 1.33

Unless -v is given, ignore EEXIST errors from the IOC_CPU_UCODE_APPLY ioctl()
used to implement "cpuctl ucode N", which indicates that the microcode
to be loaded already exists in the CPU, and as such, isn't really a
very interesting "error".
 1.28.8.2  05-Aug-2020  martin Pull up the following revisions, requested by msaitoh in ticket #1585:

usr.sbin/cpuctl/Makefile 1.9
usr.sbin/cpuctl/arch/cpuctl_i386.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.111-1.113 via patch
usr.sbin/cpuctl/cpuctl.c 1.31
usr.sbin/cpuctl/cpuctl.h 1.7
sys/arch/x86/x86/identcpu_subr.c 1.1-1.7

- Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel
processors.
- Add 0xa5 and 0xa6 for Comet Lake.
- Rename ci_cpuid_level to ci_max_cpuid and ci_cpuid_extlevel to
ci_max_ext_cpuid to match x86/include/cpu.h. No functional change.
- Sort some entries.
- Add comment.
 1.28.8.1  12-May-2019  martin Pull up following revision(s) (requested by maxv in ticket #1260):

common/lib/libc/sys/cpuset.c: revision 1.21
usr.sbin/cpuctl/cpuctl.c: revision 1.30

Fix bug, the computation of cpuset_nentries was incorrect, we must do +1
to be able to address the last 32 bits.

On a machine with 80 CPUs, this caused "cpuctl identify >64" to return
garbage.

Check the return value of cpuset_set(), to prevent future surprises.
 1.29.4.2  21-Apr-2020  martin Sync with HEAD
 1.29.4.1  10-Jun-2019  christos Sync with HEAD
 1.30.2.2  23-Aug-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #1724):

usr.sbin/cpuctl/cpuctl.8: revision 1.21
usr.sbin/cpuctl/cpuctl.c: revision 1.33

Unless -v is given, ignore EEXIST errors from the IOC_CPU_UCODE_APPLY ioctl()
used to implement "cpuctl ucode N", which indicates that the microcode
to be loaded already exists in the CPU, and as such, isn't really a
very interesting "error".
 1.30.2.1  10-Jul-2020  martin Pull up the following revisions (all via patch) requested by msaitoh in
ticket #995:

usr.sbin/cpuctl/Makefile 1.9
usr.sbin/cpuctl/arch/cpuctl_i386.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.111-1.113
usr.sbin/cpuctl/cpuctl.c 1.31
usr.sbin/cpuctl/cpuctl.h 1.7
sys/arch/x86/x86/identcpu_subr.c 1.1-1.7

- Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel
processors.
- Add 0xa5 and 0xa6 for Comet Lake.
- Rename ci_cpuid_level to ci_max_cpuid and ci_cpuid_extlevel to
ci_max_ext_cpuid to match x86/include/cpu.h. No functional change.
- Sort some entries.
- Add comment.
 1.32.2.1  23-Aug-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #339):

usr.sbin/cpuctl/cpuctl.8: revision 1.21
usr.sbin/cpuctl/cpuctl.c: revision 1.33

Unless -v is given, ignore EEXIST errors from the IOC_CPU_UCODE_APPLY ioctl()
used to implement "cpuctl ucode N", which indicates that the microcode
to be loaded already exists in the CPU, and as such, isn't really a
very interesting "error".

RSS XML Feed