Lines Matching refs:logical
28 shlr.b r0l ; shift right logical by one
54 shlr.b @er0 ; shift right logical by one, indirect
83 shlr.b @er0+ ; shift right logical by one, postinc
113 shlr.b @er0- ; shift right logical by one, postdec
143 shlr.b @+er0 ; shift right logical by one, preinc
173 shlr.b @-er0 ; shift right logical by one, predec
203 shlr.b @(2:2, er0) ; shift right logical by one, disp2
233 shlr.b @(44:16, er0) ; shift right logical by one, disp16
264 shlr.b @(666:32, er0) ; shift right logical by one, disp32
294 shlr.b @byte_dest:16 ; shift right logical by one, abs16
323 shlr.b @byte_dest:32 ; shift right logical by one, abs32
353 shlr.b #2, r0l ; shift right logical by two
378 shlr.b #2, @er0 ; shift right logical by two, indirect
407 shlr.b #2, @er0+ ; shift right logical by two, postinc
437 shlr.b #2, @er0- ; shift right logical by two, postdec
467 shlr.b #2, @+er0 ; shift right logical by two, preinc
497 shlr.b #2, @-er0 ; shift right logical by two, predec
527 shlr.b #2, @(2:2, er0) ; shift right logical by two, disp2
557 shlr.b #2, @(44:16, er0) ; shift right logical by two, disp16
588 shlr.b #2, @(666:32, er0) ; shift right logical by two, disp32
618 shlr.b #2, @byte_dest:16 ; shift right logical by two, abs16
647 shlr.b #2, @byte_dest:32 ; shift right logical by two, abs32
676 shlr.b #4, r0l ; shift right logical by four
699 shlr.b r0h, r0l ; shift right logical by register value
721 shlr.b #4, @er0 ; shift right logical by four, indirect
750 shlr.b #4, @er0+ ; shift right logical by four, postinc
780 shlr.b #4, @er0- ; shift right logical by four, postdec
810 shlr.b #4, @+er0 ; shift right logical by four, preinc
840 shlr.b #4, @-er0 ; shift right logical by four, predec
870 shlr.b #4, @(2:2, er0) ; shift right logical by four, disp2
900 shlr.b #4, @(44:16, er0) ; shift right logical by four, disp16
931 shlr.b #4, @(666:32, er0) ; shift right logical by four, disp32
961 shlr.b #4, @byte_dest:16 ; shift right logical by four, abs16
990 shlr.b #4, @byte_dest:32 ; shift right logical by four, abs32
1021 shlr.w #15:5, r0 ; shift right logical by 5-bit immediate
1047 shlr.w r0 ; shift right logical by one
1071 shlr.w @er0 ; shift right logical by one, indirect
1100 shlr.w @er0+ ; shift right logical by one, postinc
1130 shlr.w @er0- ; shift right logical by one, postdec
1160 shlr.w @+er0 ; shift right logical by one, preinc
1190 shlr.w @-er0 ; shift right logical by one, predec
1220 shlr.w @(4:2, er0) ; shift right logical by one, disp2
1250 shlr.w @(44:16, er0) ; shift right logical by one, disp16
1281 shlr.w @(666:32, er0) ; shift right logical by one, disp32
1311 shlr.w @word_dest:16 ; shift right logical by one, abs16
1340 shlr.w @word_dest:32 ; shift right logical by one, abs32
1370 shlr.w #2, r0 ; shift right logical by two
1394 shlr.w #2, @er0 ; shift right logical by two, indirect
1423 shlr.w #2, @er0+ ; shift right logical by two, postinc
1453 shlr.w #2, @er0- ; shift right logical by two, postdec
1483 shlr.w #2, @+er0 ; shift right logical by two, preinc
1513 shlr.w #2, @-er0 ; shift right logical by two, predec
1543 shlr.w #2, @(4:2, er0) ; shift right logical by two, disp2
1573 shlr.w #2, @(44:16, er0) ; shift right logical by two, disp16
1604 shlr.w #2, @(666:32, er0) ; shift right logical by two, disp32
1634 shlr.w #2, @word_dest:16 ; shift right logical by two, abs16
1663 shlr.w #2, @word_dest:32 ; shift right logical by two, abs32
1692 shlr.w #4, r0 ; shift right logical by four
1715 shlr.w r1l, r0 ; shift right logical by register value
1737 shlr.w #4, @er0 ; shift right logical by four, indirect
1766 shlr.w #4, @er0+ ; shift right logical by four, postinc
1796 shlr.w #4, @er0- ; shift right logical by four, postdec
1826 shlr.w #4, @+er0 ; shift right logical by four, preinc
1856 shlr.w #4, @-er0 ; shift right logical by four, predec
1886 shlr.w #4, @(4:2, er0) ; shift right logical by four, disp2
1916 shlr.w #4, @(44:16, er0) ; shift right logical by four, disp16
1947 shlr.w #4, @(666:32, er0) ; shift right logical by four, disp32
1977 shlr.w #4, @word_dest:16 ; shift right logical by four, abs16
2006 shlr.w #4, @word_dest:32 ; shift right logical by four, abs32
2035 shlr.w #8, r0 ; shift right logical by eight
2058 shlr.w #8, @er0 ; shift right logical by eight, indirect
2087 shlr.w #8, @er0+ ; shift right logical by eight, postinc
2117 shlr.w #8, @er0- ; shift right logical by eight, postdec
2147 shlr.w #8, @+er0 ; shift right logical by eight, preinc
2177 shlr.w #8, @-er0 ; shift right logical by eight, predec
2207 shlr.w #8, @(4:2, er0) ; shift right logical by eight, disp2
2237 shlr.w #8, @(44:16, er0) ; shift right logical by eight, disp16
2268 shlr.w #8, @(666:32, er0) ; shift right logical by eight, disp32
2298 shlr.w #8, @word_dest:16 ; shift right logical by eight, abs16
2327 shlr.w #8, @word_dest:32 ; shift right logical by eight, abs32
2356 shlr.l #31:5, er0 ; shift right logical
2382 shlr.l er0 ; shift right logical by one, register
2408 shlr.l @er0 ; shift right logical by one, indirect
2439 shlr.l @er0+ ; shift right logical by one, postinc
2470 shlr.l @er0- ; shift right logical by one, postdec
2501 shlr.l @+er0 ; shift right logical by one, preinc
2532 shlr.l @-er0 ; shift right logical by one, predec
2563 shlr.l @(8:2, er0) ; shift right logical by one, disp2
2594 shlr.l @(44:16, er0) ; shift right logical by one, disp16
2626 shlr.l @(666:32, er0) ; shift right logical by one, disp32
2657 shlr.l @long_dest:16 ; shift right logical by one, abs16
2688 shlr.l @long_dest:32 ; shift right logical by one, abs32
2720 shlr.l #2, er0 ; shift right logical by two, register
2746 shlr.l #2, @er0 ; shift right logical by two, indirect
2777 shlr.l #2, @er0+ ; shift right logical by two, postinc
2808 shlr.l #2, @er0- ; shift right logical by two, postdec
2839 shlr.l #2, @+er0 ; shift right logical by two, preinc
2870 shlr.l #2, @-er0 ; shift right logical by two, predec
2901 shlr.l #2, @(8:2, er0) ; shift right logical by two, disp2
2932 shlr.l #2, @(44:16, er0) ; shift right logical by two, disp16
2964 shlr.l #2, @(666:32, er0) ; shift right logical by two, disp32
2995 shlr.l #2, @long_dest:16 ; shift right logical by two, abs16
3026 shlr.l #2, @long_dest:32 ; shift right logical by two, abs32
3057 shlr.l #4, er0 ; shift right logical by four, register
3081 shlr.l r1l, er0 ; shift right logical by value of register
3104 shlr.l #4, @er0 ; shift right logical by four, indirect
3135 shlr.l #4, @er0+ ; shift right logical by four, postinc
3166 shlr.l #4, @er0- ; shift right logical by four, postdec
3197 shlr.l #4, @+er0 ; shift right logical by four, preinc
3228 shlr.l #4, @-er0 ; shift right logical by four, predec
3259 shlr.l #4, @(8:2, er0) ; shift right logical by four, disp2
3290 shlr.l #4, @(44:16, er0) ; shift right logical by four, disp16
3322 shlr.l #4, @(666:32, er0) ; shift right logical by four, disp32
3353 shlr.l #4, @long_dest:16 ; shift right logical by four, abs16
3384 shlr.l #4, @long_dest:32 ; shift right logical by four, abs32
3415 shlr.l #8, er0 ; shift right logical by eight, register
3439 shlr.l #8, @er0 ; shift right logical by eight, indirect
3470 shlr.l #8, @er0+ ; shift right logical by eight, postinc
3501 shlr.l #8, @er0- ; shift right logical by eight, postdec
3532 shlr.l #8, @+er0 ; shift right logical by eight, preinc
3563 shlr.l #8, @-er0 ; shift right logical by eight, predec
3594 shlr.l #8, @(8:2, er0) ; shift right logical by eight, disp2
3625 shlr.l #8, @(44:16, er0) ; shift right logical by eight, disp16
3657 shlr.l #8, @(666:32, er0) ; shift right logical by eight, disp32
3688 shlr.l #8, @long_dest:16 ; shift right logical by eight, abs16
3719 shlr.l #8, @long_dest:32 ; shift right logical by eight, abs32
3750 shlr.l #16, er0 ; shift right logical by sixteen, register
3774 shlr.l #16, @er0 ; shift right logical by sixteen, indirect
3805 shlr.l #16, @er0+ ; shift right logical by sixteen, postinc
3836 shlr.l #16, @er0- ; shift right logical by sixteen, postdec
3867 shlr.l #16, @+er0 ; shift right logical by sixteen, preinc
3898 shlr.l #16, @-er0 ; shift right logical by sixteen, predec
3929 shlr.l #16, @(8:2, er0) ; shift right logical by 16, dest2
3960 shlr.l #16, @(44:16, er0) ; shift right logical by 16, disp16
3992 shlr.l #16, @(666:32, er0) ; shift right logical by 16, disp32
4023 shlr.l #16, @long_dest:16 ; shift right logical by 16, abs16
4054 shlr.l #16, @long_dest:32 ; shift right logical by 16, abs32
Indexes created Sun Apr 26 00:22:38 UTC 2026