Cross Reference: /src/sys/arch/arm/cortex/gicv3

Lines Matching defs:eventid
205 gits_command_mapti(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid, uint32_t pintid, uint16_t icid)
210 	 * Map the event defined by EventID and DeviceID to its associated ITE, defined by ICID and pINTID
215 	cmd.dw[1] = eventid | ((uint64_t)pintid << 32);
218 	DPRINTF(("ITS #%u: MAPTI deviceid 0x%x eventid 0x%x pintid 0x%x icid 0x%x\n",
219 	    its->its_id, deviceid, eventid, pintid, icid));
225 gits_command_movi(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid, uint16_t icid)
231 	 * EventID.
235 	cmd.dw[1] = eventid;
238 	DPRINTF(("ITS #%u: MOVI deviceid 0x%x eventid 0x%x icid 0x%x\n",
239 	    its->its_id, deviceid, eventid, icid));
245 gits_command_inv(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid)
251 	 * EventID is consistent with the LPI configuration tables.
255 	cmd.dw[1] = eventid;
257 	DPRINTF(("ITS #%u: INV deviceid 0x%x eventid 0x%x\n",
258 	    its->its_id, deviceid, eventid));
304 gits_command_int(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid)
309 	 * Translate the deviceid and eventid into an icid and pintid through
316 	cmd.dw[1] = eventid;
318 	DPRINTF(("ITS #%u: INT deviceid 0x%x eventid 0x%x\n",
319 	    its->its_id, deviceid, eventid));
390 	uint32_t eventid = ITS_INVALID_EVENTID;
400 					eventid = index * 32 + bit;
407 				eventid = ITS_INVALID_EVENTID;
415 		eventid = ITS_INVALID_EVENTID;
418 			index = (eventid + n) / 32;
419 			bit = (eventid + n) % 32;
426 	if (__predict_false(eventid == ITS_INVALID_EVENTID)) {
431 	return eventid;
435 gicv3_its_free_eventid(struct gicv3_its_device *dev, uint32_t eventid)
439 	KASSERT(eventid < ITS_MAX_EVENTS);
441 	index = eventid / 32;
442 	bit = eventid % 32;
654 	uint32_t eventid;
672 	eventid = gicv3_its_alloc_eventid(dev, *count);
673 	KASSERT(eventid != ITS_INVALID_EVENTID);
679 		    __SHIFTIN(eventid + n, ARM_PCI_INTR_MSI_VEC) |
683 			gicv3_its_msi_enable(its, lpi, eventid + n, *count);
686 		 * Record devid, eventid, dev, and target PE
689 		its->its_eventid[lpi - its->its_pic->pic_irqbase] = eventid + n;
696 		gits_command_mapti(its, devid, eventid + n, lpi, cpu_index(ci));
722 	uint32_t eventid;
757 	eventid = gicv3_its_alloc_eventid(dev, *count);
758 	KASSERT(eventid != ITS_INVALID_EVENTID);
765 		    __SHIFTIN(eventid + n, ARM_PCI_INTR_MSI_VEC) |
768 		gicv3_its_msix_enable(its, lpi, msix_vec, eventid + n, bst, bsh);
771 		 * Record devid, eventid, dev, and target PE
774 		its->its_eventid[lpi - its->its_pic->pic_irqbase] = eventid + n;
781 		gits_command_mapti(its, devid, eventid + n, lpi, cpu_index(ci));
800 	const uint32_t eventid = __SHIFTOUT(ih, ARM_PCI_INTR_MSI_VEC);
811 	gits_command_inv(its, devid, eventid);
825 		const uint32_t eventid = __SHIFTOUT(pih[n], ARM_PCI_INTR_MSI_VEC);
834 		gicv3_its_free_eventid(dev, eventid);
1104 		const uint32_t eventid = its->its_eventid[irq];
1105 		KASSERT(eventid != ITS_INVALID_EVENTID);
1106 		gits_command_movi(its, devid, eventid, cpu_index(ci));
1146 		const uint32_t eventid = its->its_eventid[irq];
1147 		KASSERT(eventid != ITS_INVALID_EVENTID);
1149 		gits_command_movi(its, devid, eventid, cpu_index(ci));
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