Cross Reference: /src/sys/arch/arm/cortex/gicv3

Lines Matching defs:lpi
251 	 * EventID is consistent with the LPI configuration tables.
269 	 * Ensure any caching associated with this ICID is consistent with LPI
373 gicv3_its_msi_free_lpi(struct gicv3_its *its, int lpi)
378 	KASSERT(lpi >= its->its_pic->pic_irqbase);
380 	pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
381 	its->its_pa[lpi - its->its_pic->pic_irqbase] = NULL;
384 	vmem_free(its->its_gic->sc_lpi_pool, lpi - its->its_pic->pic_irqbase, 1);
476 gicv3_its_msi_enable(struct gicv3_its *its, int lpi, int count)
478 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
500 		    lpi - its->its_pic->pic_irqbase);
506 		    lpi - its->its_pic->pic_irqbase);
513 gicv3_its_msi_disable(struct gicv3_its *its, int lpi)
515 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
530 gicv3_its_msix_enable(struct gicv3_its *its, int lpi, int msix_vec,
533 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
547 	bus_space_write_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_DATA, lpi - its->its_pic->pic_irqbase);
558 gicv3_its_msix_disable(struct gicv3_its *its, int lpi)
560 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
599 		const int lpi = gicv3_its_msi_alloc_lpi(its, pa);
600 		KASSERT(lpi >= 0);
602 		    __SHIFTIN(lpi, ARM_PCI_INTR_IRQ) |
607 			gicv3_its_msi_enable(its, lpi, *count);
612 		its->its_devid[lpi - its->its_pic->pic_irqbase] = devid;
613 		its->its_targets[lpi - its->its_pic->pic_irqbase] = ci;
618 		gits_command_mapti(its, devid, lpi - its->its_pic->pic_irqbase, lpi, cpu_index(ci));
677 		const int lpi = gicv3_its_msi_alloc_lpi(its, pa);
678 		KASSERT(lpi >= 0);
681 		    __SHIFTIN(lpi, ARM_PCI_INTR_IRQ) |
685 		gicv3_its_msix_enable(its, lpi, msix_vec, bst, bsh);
690 		its->its_devid[lpi - its->its_pic->pic_irqbase] = devid;
691 		its->its_targets[lpi - its->its_pic->pic_irqbase] = ci;
696 		gits_command_mapti(its, devid, lpi - its->its_pic->pic_irqbase, lpi, cpu_index(ci));
714 	const int lpi = __SHIFTOUT(ih, ARM_PCI_INTR_IRQ);
717 	intrh = pic_establish_intr(its->its_pic, lpi - its->its_pic->pic_irqbase, ipl,
722 	/* Invalidate LPI configuration tables */
723 	KASSERT(its->its_pa[lpi - its->its_pic->pic_irqbase] != NULL);
724 	const uint32_t devid = its->its_devid[lpi - its->its_pic->pic_irqbase];
725 	gits_command_inv(its, devid, lpi - its->its_pic->pic_irqbase);
738 		const int lpi = __SHIFTOUT(pih[n], ARM_PCI_INTR_IRQ);
739 		KASSERT(lpi >= its->its_pic->pic_irqbase);
741 			gicv3_its_msix_disable(its, lpi);
743 			gicv3_its_msi_disable(its, lpi);
744 		gicv3_its_msi_free_lpi(its, lpi);
745 		its->its_targets[lpi - its->its_pic->pic_irqbase] = NULL;
746 		its->its_devid[lpi - its->its_pic->pic_irqbase] = 0;
748 		    its->its_pic->pic_sources[lpi - its->its_pic->pic_irqbase];
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