Lines Matching refs:psc
210 struct tegra_xusb_softc * const psc = device_private(self);
211 struct xhci_softc * const sc = &psc->sc_xhci;
231 psc->sc_phandle = faa->faa_phandle;
233 psc->sc_txd = of_compatible_lookup(faa->faa_phandle, compat_data)->data;
251 error = bus_space_map(sc->sc_iot, addr, size, 0, &psc->sc_bsh_fpci);
262 error = bus_space_map(sc->sc_iot, addr, size, 0, &psc->sc_bsh_ipfs);
274 psc->sc_ih = fdtbus_intr_establish_xname(faa->faa_phandle, 0, IPL_USB,
276 if (psc->sc_ih == NULL) {
288 psc->sc_ih_mbox = fdtbus_intr_establish_xname(faa->faa_phandle, 1,
289 IPL_VM, FDT_INTR_MPSAFE, tegra_xusb_intr_mbox, psc,
291 if (psc->sc_ih_mbox == NULL) {
351 psc->sc_clk_ss_src = fdtbus_clock_get(faa->faa_phandle, "xusb_ss_src");
352 tegra_xusb_attach_check(sc, psc->sc_clk_ss_src == NULL,
355 if (psc->sc_txd->txd_scale_ss_clock) {
356 rate = clk_get_rate(psc->sc_clk_ss_src);
358 error = clk_set_rate(psc->sc_clk_ss_src, 2000000);
359 rate = clk_get_rate(psc->sc_clk_ss_src);
363 rate = clk_get_rate(psc->sc_clk_ss_src);
367 error = clk_set_rate(psc->sc_clk_ss_src, 120000000);
368 rate = clk_get_rate(psc->sc_clk_ss_src);
373 rate = clk_get_rate(psc->sc_clk_ss_src);
374 error = clk_enable(psc->sc_clk_ss_src);
402 tegra_xusb_init_regulators(psc);
404 tegra_xusb_init(psc);
407 if (psc->sc_txd->txd_type == XUSB_T124)
411 if (psc->sc_txd->txd_type == XUSB_T210)
424 struct tegra_xusb_softc * const psc = device_private(self);
425 struct xhci_softc * const sc = &psc->sc_xhci;
427 const bus_space_handle_t ipfsh = psc->sc_bsh_ipfs;
439 if (tegra_xusb_open_fw(psc) != 0)
445 clk = fdtbus_clock_get(psc->sc_phandle, "xusb_falcon_src");
450 clk = fdtbus_clock_get(psc->sc_phandle, "xusb_host_src");
458 rst = fdtbus_reset_get(psc->sc_phandle, "xusb_host");
461 rst = fdtbus_reset_get(psc->sc_phandle, "xusb_src");
464 rst = fdtbus_reset_get(psc->sc_phandle, "xusb_ss");
467 val = csb_read_4(psc, XUSB_CSB_FALCON_CPUCTL_REG);
470 val = bus_space_read_4(bst, psc->sc_bsh_fpci, PCI_USBREV)
505 error = xusb_mailbox_send(psc, 0x01000000);
514 struct tegra_xusb_softc * const psc = v;
515 struct xhci_softc * const sc = &psc->sc_xhci;
517 const bus_space_handle_t fpcih = psc->sc_bsh_fpci;
553 if (psc->sc_txd->txd_scale_ss_clock) {
555 rate = clk_get_rate(psc->sc_clk_ss_src);
556 DPRINTF(sc->sc_dev, "rate of psc->sc_clk_ss_src %u\n",
558 error = clk_set_rate(psc->sc_clk_ss_src, data * 1000);
561 rate = clk_get_rate(psc->sc_clk_ss_src);
563 "rate of psc->sc_clk_ss_src %u after\n", rate);
575 xusb_mailbox_send(psc, msg);
580 xusb_mailbox_send(psc, msg);
600 tegra_xusb_init_regulators(struct tegra_xusb_softc * const psc)
603 device_t dev = psc->sc_xhci.sc_dev;
604 const int phandle = psc->sc_phandle;
608 for (n = 0; n < psc->sc_txd->txd_nsupplies; n++) {
609 if (!of_hasprop(phandle, psc->sc_txd->txd_supplies[n]))
611 reg = fdtbus_regulator_acquire(phandle, psc->sc_txd->txd_supplies[n]);
614 psc->sc_txd->txd_supplies[n]);
620 psc->sc_txd->txd_supplies[n], error);
625 tegra_xusb_init(struct tegra_xusb_softc * const psc)
627 struct xhci_softc * const sc = &psc->sc_xhci;
629 const bus_space_handle_t ipfsh = psc->sc_bsh_ipfs;
630 const bus_space_handle_t fpcih = psc->sc_bsh_fpci;
682 fw_dma_alloc(struct tegra_xusb_softc * const psc, size_t size, size_t align,
685 struct xhci_softc * const sc = &psc->sc_xhci;
720 fw_dma_free(struct tegra_xusb_softc * const psc, struct fw_dma * const p)
722 const struct xhci_softc * const sc = &psc->sc_xhci;
737 tegra_xusb_open_fw(struct tegra_xusb_softc * const psc)
739 struct xhci_softc * const sc = &psc->sc_xhci;
747 switch (psc->sc_txd->txd_type) {
781 error = fw_dma_alloc(psc, firmware_size, PAGE_SIZE,
782 &psc->sc_fw_dma);
785 firmware_image = psc->sc_fw_dma.addr;
790 fw_dma_free(psc, &psc->sc_fw_dma);
799 return tegra_xusb_load_fw(psc, firmware_image, firmware_size);
803 tegra_xusb_load_fw(struct tegra_xusb_softc * const psc, void *firmware_image,
806 struct xhci_softc * const sc = &psc->sc_xhci;
819 bus_dmamap_sync(sc->sc_bus.ub_dmatag, psc->sc_fw_dma.map, 0,
823 csb_read_4(psc, XUSB_CSB_FALCON_CPUCTL_REG));
825 csb_read_4(psc, XUSB_CSB_MEMPOOL_ILOAD_BASE_LO_REG));
828 csb_read_4(psc, XUSB_CSB_MEMPOOL_ILOAD_ATTR_REG));
829 csb_write_4(psc, XUSB_CSB_MEMPOOL_ILOAD_ATTR_REG,
832 csb_read_4(psc, XUSB_CSB_MEMPOOL_ILOAD_ATTR_REG));
834 const uint64_t fwbase = psc->sc_fw_dma.map->dm_segs[0].ds_addr +
837 csb_write_4(psc, XUSB_CSB_MEMPOOL_ILOAD_BASE_HI_REG, fwbase >> 32);
838 csb_write_4(psc, XUSB_CSB_MEMPOOL_ILOAD_BASE_LO_REG, fwbase);
840 csb_read_4(psc, XUSB_CSB_MEMPOOL_ILOAD_BASE_LO_REG));
842 csb_read_4(psc, XUSB_CSB_MEMPOOL_ILOAD_BASE_HI_REG));
845 csb_read_4(psc, XUSB_CSB_MEMPOOL_APMAP_REG));
846 csb_write_4(psc, XUSB_CSB_MEMPOOL_APMAP_REG,
849 csb_read_4(psc, XUSB_CSB_MEMPOOL_APMAP_REG));
852 csb_read_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_TRIG_REG));
853 csb_write_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_TRIG_REG,
857 csb_read_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_TRIG_REG));
866 csb_read_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_SIZE_REG));
867 csb_write_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_SIZE_REG,
873 csb_read_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_SIZE_REG));
876 csb_read_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_TRIG_REG));
877 csb_write_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_TRIG_REG,
881 csb_read_4(psc, XUSB_CSB_MEMPOOL_L2IMEMOP_TRIG_REG));
884 csb_read_4(psc, XUSB_CSB_FALCON_IMFILLCTL_REG));
885 csb_write_4(psc, XUSB_CSB_FALCON_IMFILLCTL_REG, code_size_blocks);
887 csb_read_4(psc, XUSB_CSB_FALCON_IMFILLCTL_REG));
890 csb_read_4(psc, XUSB_CSB_FALCON_IMFILLRNG1_REG));
891 csb_write_4(psc, XUSB_CSB_FALCON_IMFILLRNG1_REG,
895 csb_read_4(psc, XUSB_CSB_FALCON_IMFILLRNG1_REG));
898 csb_read_4(psc, XUSB_CSB_FALCON_DMACTL_REG));
899 csb_write_4(psc, XUSB_CSB_FALCON_DMACTL_REG, 0);
901 csb_read_4(psc, XUSB_CSB_FALCON_DMACTL_REG));
904 csb_read_4(psc, XUSB_CSB_FALCON_BOOTVEC_REG));
905 csb_write_4(psc, XUSB_CSB_FALCON_BOOTVEC_REG,
908 csb_read_4(psc, XUSB_CSB_FALCON_BOOTVEC_REG));
911 csb_read_4(psc, XUSB_CSB_FALCON_CPUCTL_REG));
912 csb_write_4(psc, XUSB_CSB_FALCON_CPUCTL_REG,
915 csb_read_4(psc, XUSB_CSB_FALCON_CPUCTL_REG));
921 csb_read_4(struct tegra_xusb_softc * const psc, bus_size_t csb_offset)
925 const bus_space_tag_t bst = psc->sc_xhci.sc_iot;
926 const bus_space_handle_t fpcih = psc->sc_bsh_fpci;
933 csb_write_4(struct tegra_xusb_softc * const psc, bus_size_t csb_offset,
938 const bus_space_tag_t bst = psc->sc_xhci.sc_iot;
939 const bus_space_handle_t fpcih = psc->sc_bsh_fpci;
946 xusb_mailbox_send(struct tegra_xusb_softc * const psc, uint32_t msg)
948 struct xhci_softc * const sc = &psc->sc_xhci;
949 const bus_space_tag_t bst = psc->sc_xhci.sc_iot;
950 const bus_space_handle_t fpcih = psc->sc_bsh_fpci;
Indexes created Sun Oct 19 02:09:48 GMT 2025