Home | History | Annotate | Download | only in rockchip

Lines Matching refs:RK_COMPOSITE

200 	RK_COMPOSITE(RK3328_ACLK_BUS_PRE, "aclk_bus_pre", aclk_bus_pre_parents,
207 	RK_COMPOSITE(RK3328_HCLK_BUS_PRE, "hclk_bus_pre", hclk_bus_pre_parents,
214 	RK_COMPOSITE(RK3328_PCLK_BUS_PRE, "pclk_bus_pre", pclk_bus_pre_parents,
221 	RK_COMPOSITE(RK3328_SCLK_SPI, "clk_spi", mux_2plls_parents,
228 	RK_COMPOSITE(RK3328_SCLK_PWM, "clk_pwm", mux_2plls_parents,
235 	RK_COMPOSITE(RK3328_ACLK_PERI_PRE, "aclk_peri_pre", aclk_peri_pre_parents,
241 	RK_COMPOSITE(RK3328_PCLK_PERI, "pclk_peri", phclk_peri_parents,
248 	RK_COMPOSITE(RK3328_HCLK_PERI, "hclk_peri", phclk_peri_parents,
255 	RK_COMPOSITE(RK3328_SCLK_SDMMC, "clk_sdmmc", mmc_parents,
262 	RK_COMPOSITE(RK3328_SCLK_SDIO, "clk_sdio", mmc_parents,
269 	RK_COMPOSITE(RK3328_SCLK_EMMC, "clk_emmc", mmc_parents,
276 	RK_COMPOSITE(0, "clk_uart0_div", comp_uart_parents,
283 	RK_COMPOSITE(0, "clk_uart1_div", comp_uart_parents,
290 	RK_COMPOSITE(0, "clk_uart2_div", comp_uart_parents,
297 	RK_COMPOSITE(RK3328_ACLK_GMAC, "aclk_gmac", mux_2plls_hdmiphy_parents,
304 	RK_COMPOSITE(RK3328_PCLK_GMAC, "pclk_gmac", pclk_gmac_parents,
311 	RK_COMPOSITE(RK3328_SCLK_MAC2IO_SRC, "clk_mac2io_src", mux_2plls_parents,
318 	RK_COMPOSITE(RK3328_SCLK_MAC2IO_OUT, "clk_mac2io_out", mux_2plls_parents,
325 	RK_COMPOSITE(RK3328_SCLK_I2C0, "clk_i2c0", mux_2plls_parents,
332 	RK_COMPOSITE(RK3328_SCLK_I2C1, "clk_i2c1", mux_2plls_parents,
339 	RK_COMPOSITE(RK3328_SCLK_I2C2, "clk_i2c2", mux_2plls_parents,
346 	RK_COMPOSITE(RK3328_SCLK_I2C3, "clk_i2c3", mux_2plls_parents,
353 	RK_COMPOSITE(RK3328_SCLK_TSADC, "clk_tsadc", mux_clk_tsadc_parents,
360 	RK_COMPOSITE(RK3328_SCLK_CRYPTO, "clk_crypto", mux_2plls_parents,
422 	RK_COMPOSITE(0, "clk_i2s0_div", mux_2plls_parents,
429 	RK_COMPOSITE(0, "clk_i2s1_div", mux_2plls_parents,
436 	RK_COMPOSITE(0, "clk_i2s2_div", mux_2plls_parents,
443 	RK_COMPOSITE(0, "clk_spdif_div", mux_2plls_parents,
476 	RK_COMPOSITE(RK3328_SCLK_I2S1_OUT, "i2s1_out", mux_i2s1out_parents,
483 	RK_COMPOSITE(RK3328_SCLK_I2S2_OUT, "i2s2_out", mux_i2s2out_parents,