Lines Matching refs:RK_GATE
653 RK_GATE(RK3588_PCLK_BIGCORE0_PVTM, "pclk_bigcore0_pvtm",
656 RK_GATE(RK3588_CLK_BIGCORE0_PVTM, "clk_bigcore0_pvtm", "xin24m",
658 RK_GATE(RK3588_CLK_CORE_BIGCORE0_PVTM, "clk_core_bigcore0_pvtm",
667 RK_GATE(RK3588_PCLK_BIGCORE1_PVTM, "pclk_bigcore1_pvtm",
670 RK_GATE(RK3588_CLK_BIGCORE1_PVTM, "clk_bigcore1_pvtm", "xin24m",
672 RK_GATE(RK3588_CLK_CORE_BIGCORE1_PVTM, "clk_core_bigcore1_pvtm",
843 RK_GATE(RK3588_PCLK_MIPI_DCPHY0, "pclk_mipi_dcphy0", "pclk_top_root",
845 RK_GATE(RK3588_PCLK_MIPI_DCPHY1, "pclk_mipi_dcphy1", "pclk_top_root",
847 RK_GATE(RK3588_PCLK_CSIPHY0, "pclk_csiphy0", "pclk_top_root",
849 RK_GATE(RK3588_PCLK_CSIPHY1, "pclk_csiphy1", "pclk_top_root",
851 RK_GATE(RK3588_PCLK_CRU, "pclk_cru", "pclk_top_root",
905 RK_GATE(RK3588_PCLK_LITCORE_PVTM, "pclk_litcore_pvtm",
908 RK_GATE(RK3588_PCLK_DBG, "pclk_dbg", "pclk_dsu_root",
910 RK_GATE(RK3588_PCLK_DSU, "pclk_dsu", "pclk_dsu_root",
912 RK_GATE(RK3588_PCLK_S_DAPLITE, "pclk_s_daplite", "pclk_dsu_ns_root",
914 RK_GATE(RK3588_PCLK_M_DAPLITE, "pclk_m_daplite", "pclk_dsu_root",
916 RK_GATE(RK3588_CLK_LITCORE_PVTM, "clk_litcore_pvtm", "xin24m",
918 RK_GATE(RK3588_CLK_CORE_LITCORE_PVTM, "clk_core_litcore_pvtm",
931 RK_GATE(RK3588_HCLK_I2S2_2CH, "hclk_i2s2_2ch", "hclk_audio_root",
933 RK_GATE(RK3588_HCLK_I2S3_2CH, "hclk_i2s3_2ch", "hclk_audio_root",
946 RK_GATE(RK3588_MCLK_I2S2_2CH, "mclk_i2s2_2ch", "clk_i2s2_2ch",
962 RK_GATE(RK3588_MCLK_I2S3_2CH, "mclk_i2s3_2ch", "clk_i2s3_2ch",
964 RK_GATE(RK3588_CLK_DAC_ACDCDIG, "clk_dac_acdcdig", "mclk_i2s3_2ch",
969 RK_GATE(RK3588_PCLK_ACDCDIG, "pclk_acdcdig", "pclk_audio_root",
971 RK_GATE(RK3588_HCLK_I2S0_8CH, "hclk_i2s0_8ch", "hclk_audio_root",
985 RK_GATE(RK3588_MCLK_I2S0_8CH_TX, "mclk_i2s0_8ch_tx", "clk_i2s0_8ch_tx",
999 RK_GATE(RK3588_MCLK_I2S0_8CH_RX, "mclk_i2s0_8ch_rx", "clk_i2s0_8ch_rx",
1004 RK_GATE(RK3588_HCLK_PDM1, "hclk_pdm1", "hclk_audio_root",
1011 RK_GATE(RK3588_HCLK_SPDIF0, "hclk_spdif0", "hclk_audio_root",
1024 RK_GATE(RK3588_MCLK_SPDIF0, "mclk_spdif0", "clk_spdif0",
1026 RK_GATE(RK3588_HCLK_SPDIF1, "hclk_spdif1", "hclk_audio_root",
1039 RK_GATE(RK3588_MCLK_SPDIF1, "mclk_spdif1", "clk_spdif1",
1056 RK_GATE(RK3588_PCLK_MAILBOX0, "pclk_mailbox0", "pclk_top_root",
1058 RK_GATE(RK3588_PCLK_MAILBOX1, "pclk_mailbox1", "pclk_top_root",
1060 RK_GATE(RK3588_PCLK_MAILBOX2, "pclk_mailbox2", "pclk_top_root",
1062 RK_GATE(RK3588_PCLK_PMU2, "pclk_pmu2", "pclk_top_root",
1064 RK_GATE(RK3588_PCLK_PMUCM0_INTMUX, "pclk_pmucm0_intmux",
1067 RK_GATE(RK3588_PCLK_DDRCM0_INTMUX, "pclk_ddrcm0_intmux",
1070 RK_GATE(RK3588_PCLK_PWM1, "pclk_pwm1", "pclk_top_root",
1077 RK_GATE(RK3588_CLK_PWM1_CAPTURE, "clk_pwm1_capture", "xin24m",
1079 RK_GATE(RK3588_PCLK_PWM2, "pclk_pwm2", "pclk_top_root",
1086 RK_GATE(RK3588_CLK_PWM2_CAPTURE, "clk_pwm2_capture", "xin24m",
1088 RK_GATE(RK3588_PCLK_PWM3, "pclk_pwm3", "pclk_top_root",
1095 RK_GATE(RK3588_CLK_PWM3_CAPTURE, "clk_pwm3_capture", "xin24m",
1097 RK_GATE(RK3588_PCLK_BUSTIMER0, "pclk_bustimer0", "pclk_top_root",
1099 RK_GATE(RK3588_PCLK_BUSTIMER1, "pclk_bustimer1", "pclk_top_root",
1106 RK_GATE(RK3588_CLK_BUSTIMER0, "clk_bustimer0", "clk_bus_timer_root",
1108 RK_GATE(RK3588_CLK_BUSTIMER1, "clk_bustimer1", "clk_bus_timer_root",
1110 RK_GATE(RK3588_CLK_BUSTIMER2, "clk_bustimer2", "clk_bus_timer_root",
1112 RK_GATE(RK3588_CLK_BUSTIMER3, "clk_bustimer3", "clk_bus_timer_root",
1114 RK_GATE(RK3588_CLK_BUSTIMER4, "clk_bustimer4", "clk_bus_timer_root",
1116 RK_GATE(RK3588_CLK_BUSTIMER5, "clk_bustimer5", "clk_bus_timer_root",
1118 RK_GATE(RK3588_CLK_BUSTIMER6, "clk_bustimer6", "clk_bus_timer_root",
1120 RK_GATE(RK3588_CLK_BUSTIMER7, "clk_bustimer7", "clk_bus_timer_root",
1122 RK_GATE(RK3588_CLK_BUSTIMER8, "clk_bustimer8", "clk_bus_timer_root",
1124 RK_GATE(RK3588_CLK_BUSTIMER9, "clk_bustimer9", "clk_bus_timer_root",
1126 RK_GATE(RK3588_CLK_BUSTIMER10, "clk_bustimer10", "clk_bus_timer_root",
1128 RK_GATE(RK3588_CLK_BUSTIMER11, "clk_bustimer11", "clk_bus_timer_root",
1130 RK_GATE(RK3588_PCLK_WDT0, "pclk_wdt0", "pclk_top_root",
1132 RK_GATE(RK3588_TCLK_WDT0, "tclk_wdt0", "xin24m",
1134 RK_GATE(RK3588_PCLK_CAN0, "pclk_can0", "pclk_top_root",
1141 RK_GATE(RK3588_PCLK_CAN1, "pclk_can1", "pclk_top_root",
1148 RK_GATE(RK3588_PCLK_CAN2, "pclk_can2", "pclk_top_root",
1155 RK_GATE(RK3588_ACLK_DECOM, "aclk_decom", "aclk_bus_root",
1157 RK_GATE(RK3588_PCLK_DECOM, "pclk_decom", "pclk_top_root",
1164 RK_GATE(RK3588_ACLK_DMAC0, "aclk_dmac0", "aclk_bus_root",
1166 RK_GATE(RK3588_ACLK_DMAC1, "aclk_dmac1", "aclk_bus_root",
1168 RK_GATE(RK3588_ACLK_DMAC2, "aclk_dmac2", "aclk_bus_root",
1170 RK_GATE(RK3588_ACLK_GIC, "aclk_gic", "aclk_bus_root",
1172 RK_GATE(RK3588_PCLK_GPIO1, "pclk_gpio1", "pclk_top_root",
1179 RK_GATE(RK3588_PCLK_GPIO2, "pclk_gpio2", "pclk_top_root",
1186 RK_GATE(RK3588_PCLK_GPIO3, "pclk_gpio3", "pclk_top_root",
1193 RK_GATE(RK3588_PCLK_GPIO4, "pclk_gpio4", "pclk_top_root",
1200 RK_GATE(RK3588_PCLK_I2C1, "pclk_i2c1", "pclk_top_root",
1202 RK_GATE(RK3588_PCLK_I2C2, "pclk_i2c2", "pclk_top_root",
1204 RK_GATE(RK3588_PCLK_I2C3, "pclk_i2c3", "pclk_top_root",
1206 RK_GATE(RK3588_PCLK_I2C4, "pclk_i2c4", "pclk_top_root",
1208 RK_GATE(RK3588_PCLK_I2C5, "pclk_i2c5", "pclk_top_root",
1210 RK_GATE(RK3588_PCLK_I2C6, "pclk_i2c6", "pclk_top_root",
1212 RK_GATE
1214 RK_GATE(RK3588_PCLK_I2C8, "pclk_i2c8", "pclk_top_root",
1256 RK_GATE(RK3588_PCLK_OTPC_NS, "pclk_otpc_ns", "pclk_top_root",
1258 RK_GATE(RK3588_CLK_OTPC_NS, "clk_otpc_ns", "xin24m",
1260 RK_GATE(RK3588_CLK_OTPC_ARB, "clk_otpc_arb", "xin24m",
1262 RK_GATE(RK3588_CLK_OTP_PHY_G, "clk_otp_phy_g", "xin24m",
1264 RK_GATE(RK3588_CLK_OTPC_AUTO_RD_G, "clk_otpc_auto_rd_g", "xin24m",
1266 RK_GATE(RK3588_PCLK_SARADC, "pclk_saradc", "pclk_top_root",
1273 RK_GATE(RK3588_PCLK_SPI0, "pclk_spi0", "pclk_top_root",
1275 RK_GATE(RK3588_PCLK_SPI1, "pclk_spi1", "pclk_top_root",
1277 RK_GATE(RK3588_PCLK_SPI2, "pclk_spi2", "pclk_top_root",
1279 RK_GATE(RK3588_PCLK_SPI3, "pclk_spi3", "pclk_top_root",
1281 RK_GATE(RK3588_PCLK_SPI4, "pclk_spi4", "pclk_top_root",
1308 RK_GATE(RK3588_ACLK_SPINLOCK, "aclk_spinlock", "aclk_bus_root",
1310 RK_GATE(RK3588_PCLK_TSADC, "pclk_tsadc", "pclk_top_root",
1317 RK_GATE(RK3588_PCLK_UART1, "pclk_uart1", "pclk_top_root",
1319 RK_GATE(RK3588_PCLK_UART2, "pclk_uart2", "pclk_top_root",
1321 RK_GATE(RK3588_PCLK_UART3, "pclk_uart3", "pclk_top_root",
1323 RK_GATE(RK3588_PCLK_UART4, "pclk_uart4", "pclk_top_root",
1325 RK_GATE(RK3588_PCLK_UART5, "pclk_uart5", "pclk_top_root",
1327 RK_GATE(RK3588_PCLK_UART6, "pclk_uart6", "pclk_top_root",
1329 RK_GATE(RK3588_PCLK_UART7, "pclk_uart7", "pclk_top_root",
1331 RK_GATE(RK3588_PCLK_UART8, "pclk_uart8", "pclk_top_root",
1333 RK_GATE(RK3588_PCLK_UART9, "pclk_uart9", "pclk_top_root",
1346 RK_GATE(RK3588_SCLK_UART1, "sclk_uart1", "clk_uart1",
1359 RK_GATE(RK3588_SCLK_UART2, "sclk_uart2", "clk_uart2",
1372 RK_GATE(RK3588_SCLK_UART3, "sclk_uart3", "clk_uart3",
1385 RK_GATE(RK3588_SCLK_UART4, "sclk_uart4", "clk_uart4",
1398 RK_GATE(RK3588_SCLK_UART5, "sclk_uart5", "clk_uart5",
1411 RK_GATE(RK3588_SCLK_UART6, "sclk_uart6", "clk_uart6",
1424 RK_GATE(RK3588_SCLK_UART7, "sclk_uart7", "clk_uart7",
1437 RK_GATE(RK3588_SCLK_UART8, "sclk_uart8", "clk_uart8",
1450 RK_GATE(RK3588_SCLK_UART9, "sclk_uart9", "clk_uart9",
1472 RK_GATE(RK3588_ACLK_DMA2DDR, "aclk_dma2ddr", "aclk_center_root",
1474 RK_GATE(RK3588_ACLK_DDR_SHAREMEM, "aclk_ddr_sharemem",
1488 RK_GATE(RK3588_FCLK_DDR_CM0_CORE, "fclk_ddr_cm0_core",
1496 RK_GATE(RK3588_CLK_DDR_TIMER0, "clk_ddr_timer0", "clk_ddr_timer_root",
1498 RK_GATE(RK3588_CLK_DDR_TIMER1, "clk_ddr_timer1", "clk_ddr_timer_root",
1500 RK_GATE(RK3588_TCLK_WDT_DDR, "tclk_wdt_ddr", "xin24m",
1507 RK_GATE(RK3588_PCLK_WDT, "pclk_wdt", "pclk_center_root",
1509 RK_GATE(RK3588_PCLK_TIMER, "pclk_timer", "pclk_center_root",
1511 RK_GATE(RK3588_PCLK_DMA2DDR, "pclk_dma2ddr", "pclk_center_root",
1513 RK_GATE(RK3588_PCLK_SHAREMEM, "pclk_sharemem", "pclk_center_root",
1520 RK_GATE(RK3588_CLK_GPU, "clk_gpu", "clk_gpu_src",
1522 RK_GATE(RK3588_CLK_GPU_COREGROUP, "clk_gpu_coregroup", "clk_gpu_src",
1529 RK_GATE(RK3588_CLK_GPU_PVTM, "clk_gpu_pvtm", "xin24m",
1531 RK_GATE(RK3588_CLK_CORE_GPU_PVTM, "clk_core_gpu_pvtm", "clk_gpu_src",
1548 RK_GATE(RK3588_CLK_ISP1_CORE_MARVIN, "clk_isp1_core_marvin",
1551 RK_GATE(RK3588_CLK_ISP1_CORE_VICAP, "clk_isp1_core_vicap",
1569 RK_GATE(RK3588_ACLK_NPU1, "aclk_npu1", "clk_npu_dsu0",
1571 RK_GATE(RK3588_HCLK_NPU1, "hclk_npu1", "hclk_npu_root",
1573 RK_GATE(RK3588_ACLK_NPU2, "aclk_npu2", "clk_npu_dsu0",
1575 RK_GATE(RK3588_HCLK_NPU2, "hclk_npu2", "hclk_npu_root",
1582 RK_GATE(RK3588_FCLK_NPU_CM0_CORE, "fclk_npu_cm0_core",
1590 RK_GATE(RK3588_PCLK_NPU_PVTM, "pclk_npu_pvtm", "pclk_npu_root",
1592 RK_GATE(RK3588_PCLK_NPU_GRF, "pclk_npu_grf", "pclk_npu_root",
1594 RK_GATE(RK3588_CLK_NPU_PVTM, "clk_npu_pvtm", "xin24m",
1596 RK_GATE(RK3588_CLK_CORE_NPU_PVTM, "clk_core_npu_pvtm", "clk_npu_dsu0",
1598 RK_GATE(RK3588_ACLK_NPU0, "aclk_npu0", "clk_npu_dsu0",
1600 RK_GATE(RK3588_HCLK_NPU0, "hclk_npu0", "hclk_npu_root",
1602 RK_GATE(RK3588_PCLK_NPU_TIMER, "pclk_npu_timer", "pclk_npu_root",
1609 RK_GATE(RK3588_CLK_NPUTIMER0, "clk_nputimer0", "clk_nputimer_root",
1611 RK_GATE(RK3588_CLK_NPUTIMER1, "clk_nputimer1", "clk_nputimer_root",
1613 RK_GATE(RK3588_PCLK_NPU_WDT, "pclk_npu_wdt", "pclk_npu_root",
1615 RK_GATE(RK3588_TCLK_NPU_WDT, "tclk_npu_wdt", "xin24m",
1627 RK_GATE(RK3588_ACLK_EMMC, "aclk_emmc", "aclk_nvm_root",
1639 RK_GATE(RK3588_TMCLK_EMMC, "tmclk_emmc", "xin24m",
1681 RK_GATE(RK3588_ACLK_PHP_GIC_ITS, "aclk_php_gic_its", "aclk_pcie_root",
1683 RK_GATE(RK3588_ACLK_PCIE_BRIDGE, "aclk_pcie_bridge", "aclk_pcie_root",
1685 RK_GATE(RK3588_ACLK_MMU_PCIE, "aclk_mmu_pcie", "aclk_pcie_bridge",
1687 RK_GATE(RK3588_ACLK_MMU_PHP, "aclk_mmu_php", "aclk_php_root",
1689 RK_GATE(RK3588_ACLK_PCIE_4L_DBI, "aclk_pcie_4l_dbi", "aclk_php_root",
1691 RK_GATE(RK3588_ACLK_PCIE_2L_DBI, "aclk_pcie_2l_dbi", "aclk_php_root",
1693 RK_GATE(RK3588_ACLK_PCIE_1L0_DBI, "aclk_pcie_1l0_dbi", "aclk_php_root",
1695 RK_GATE(RK3588_ACLK_PCIE_1L1_DBI, "aclk_pcie_1l1_dbi", "aclk_php_root",
1697 RK_GATE(RK3588_ACLK_PCIE_1L2_DBI, "aclk_pcie_1l2_dbi", "aclk_php_root",
1699 RK_GATE(RK3588_ACLK_PCIE_4L_MSTR, "aclk_pcie_4l_mstr", "aclk_mmu_pcie",
1701 RK_GATE(RK3588_ACLK_PCIE_2L_MSTR, "aclk_pcie_2l_mstr", "aclk_mmu_pcie",
1703 RK_GATE(RK3588_ACLK_PCIE_1L0_MSTR, "aclk_pcie_1l0_mstr",
1706 RK_GATE(RK3588_ACLK_PCIE_1L1_MSTR, "aclk_pcie_1l1_mstr",
1709 RK_GATE(RK3588_ACLK_PCIE_1L2_MSTR, "aclk_pcie_1l2_mstr",
1712 RK_GATE(RK3588_ACLK_PCIE_4L_SLV, "aclk_pcie_4l_slv", "aclk_php_root",
1714 RK_GATE(RK3588_ACLK_PCIE_2L_SLV, "aclk_pcie_2l_slv", "aclk_php_root",
1716 RK_GATE(RK3588_ACLK_PCIE_1L0_SLV, "aclk_pcie_1l0_slv", "aclk_php_root",
1718 RK_GATE(RK3588_ACLK_PCIE_1L1_SLV, "aclk_pcie_1l1_slv", "aclk_php_root",
1720 RK_GATE(RK3588_ACLK_PCIE_1L2_SLV, "aclk_pcie_1l2_slv", "aclk_php_root",
1722 RK_GATE(RK3588_PCLK_PCIE_4L, "pclk_pcie_4l", "pclk_php_root",
1724 RK_GATE(RK3588_PCLK_PCIE_2L, "pclk_pcie_2l", "pclk_php_root",
1726 RK_GATE(RK3588_PCLK_PCIE_1L0, "pclk_pcie_1l0", "pclk_php_root",
1728 RK_GATE(RK3588_PCLK_PCIE_1L1, "pclk_pcie_1l1", "pclk_php_root",
1730 RK_GATE(RK3588_PCLK_PCIE_1L2, "pclk_pcie_1l2", "pclk_php_root",
1732 RK_GATE(RK3588_CLK_PCIE_AUX0, "clk_pcie_aux0", "xin24m",
1734 RK_GATE(RK3588_CLK_PCIE_AUX1, "clk_pcie_aux1", "xin24m",
1736 RK_GATE(RK3588_CLK_PCIE_AUX2, "clk_pcie_aux2", "xin24m",
1738 RK_GATE(RK3588_CLK_PCIE_AUX3, "clk_pcie_aux3", "xin24m",
1740 RK_GATE(RK3588_CLK_PCIE_AUX4, "clk_pcie_aux4", "xin24m",
1742 RK_GATE(RK3588_CLK_PIPEPHY0_REF, "clk_pipephy0_ref", "xin24m",
1744 RK_GATE(RK3588_CLK_PIPEPHY1_REF, "clk_pipephy1_ref", "xin24m",
1746 RK_GATE(RK3588_CLK_PIPEPHY2_REF, "clk_pipephy2_ref", "xin24m",
1748 RK_GATE(RK3588_PCLK_GMAC0, "pclk_gmac0", "pclk_php_root",
1750 RK_GATE(RK3588_PCLK_GMAC1, "pclk_gmac1", "pclk_php_root",
1752 RK_GATE(RK3588_ACLK_GMAC0, "aclk_gmac0", "aclk_mmu_php",
1754 RK_GATE(RK3588_ACLK_GMAC1, "aclk_gmac1", "aclk_mmu_php",
1756 RK_GATE(RK3588_CLK_PMALIVE0, "clk_pmalive0", "xin24m",
1758 RK_GATE(RK3588_CLK_PMALIVE1, "clk_pmalive1", "xin24m",
1760 RK_GATE(RK3588_CLK_PMALIVE2, "clk_pmalive2", "xin24m",
1762 RK_GATE(RK3588_ACLK_SATA0, "aclk_sata0", "aclk_mmu_php",
1764 RK_GATE(RK3588_ACLK_SATA1, "aclk_sata1", "aclk_mmu_php",
1766 RK_GATE(RK3588_ACLK_SATA2, "aclk_sata2", "aclk_mmu_php",
1783 RK_GATE(RK3588_ACLK_USB3OTG2, "aclk_usb3otg2", "aclk_mmu_php",
1785 RK_GATE(RK3588_SUSPEND_CLK_USB3OTG2, "suspend_clk_usb3otg2", "xin24m",
1787 RK_GATE(RK3588_REF_CLK_USB3OTG2, "ref_clk_usb3otg2", "xin24m",
1794 RK_GATE(RK3588_PCLK_PCIE_COMBO_PIPE_PHY0, "pclk_pcie_combo_pipe_phy0",
1797 RK_GATE(RK3588_PCLK_PCIE_COMBO_PIPE_PHY1, "pclk_pcie_combo_pipe_phy1",
1800 RK_GATE(RK3588_PCLK_PCIE_COMBO_PIPE_PHY2, "pclk_pcie_combo_pipe_phy2",
1803 RK_GATE(RK3588_PCLK_PCIE_COMBO_PIPE_PHY, "pclk_pcie_combo_pipe_phy",
1821 RK_GATE(RK3588_HCLK_RGA3_1, "hclk_rga3_1", "hclk_rga3_root",
1823 RK_GATE(RK3588_ACLK_RGA3_1, "aclk_rga3_1", "aclk_rga3_root",
1900 RK_GATE(RK3588_SUSPEND_CLK_USB3OTG0, "suspend_clk_usb3otg0", "xin24m",
1902 RK_GATE(RK3588_REF_CLK_USB3OTG0, "ref_clk_usb3otg0", "xin24m",
1904 RK_GATE(RK3588_SUSPEND_CLK_USB3OTG1, "suspend_clk_usb3otg1", "xin24m",
1906 RK_GATE(RK3588_REF_CLK_USB3OTG1, "ref_clk_usb3otg1", "xin24m",
1928 RK_GATE(RK3588_HCLK_IEP2P0, "hclk_iep2p0", "hclk_vdpu_root",
1935 RK_GATE(RK3588_HCLK_JPEG_ENCODER0, "hclk_jpeg_encoder0",
1938 RK_GATE(RK3588_HCLK_JPEG_ENCODER1, "hclk_jpeg_encoder1",
1941 RK_GATE(RK3588_HCLK_JPEG_ENCODER2, "hclk_jpeg_encoder2",
1944 RK_GATE(RK3588_HCLK_JPEG_ENCODER3, "hclk_jpeg_encoder3",
1947 RK_GATE(RK3588_HCLK_JPEG_DECODER, "hclk_jpeg_decoder", "hclk_vdpu_root",
1949 RK_GATE(RK3588_HCLK_RGA2, "hclk_rga2", "hclk_vdpu_root",
1951 RK_GATE(RK3588_ACLK_RGA2, "aclk_rga2", "aclk_vdpu_root",
1958 RK_GATE(RK3588_HCLK_RGA3_0, "hclk_rga3_0", "hclk_vdpu_root",
1960 RK_GATE(RK3588_ACLK_RGA3_0, "aclk_rga3_0", "aclk_vdpu_root",
1967 RK_GATE(RK3588_HCLK_VPU, "hclk_vpu", "hclk_vdpu_root",
1989 RK_GATE(RK3588_HCLK_RKVENC0, "hclk_rkvenc0", "hclk_rkvenc0_root",
1991 RK_GATE(RK3588_ACLK_RKVENC0, "aclk_rkvenc0", "aclk_rkvenc0_root",
2023 RK_GATE(RK3588_ICLK_CSIHOST0, "iclk_csihost0", "iclk_csihost01",
2025 RK_GATE(RK3588_ICLK_CSIHOST1, "iclk_csihost1", "iclk_csihost01",
2027 RK_GATE(RK3588_PCLK_CSI_HOST_0, "pclk_csi_host_0", "pclk_vi_root",
2029 RK_GATE(RK3588_PCLK_CSI_HOST_1, "pclk_csi_host_1", "pclk_vi_root",
2031 RK_GATE(RK3588_PCLK_CSI_HOST_2, "pclk_csi_host_2", "pclk_vi_root",
2033 RK_GATE(RK3588_PCLK_CSI_HOST_3, "pclk_csi_host_3", "pclk_vi_root",
2035 RK_GATE(RK3588_PCLK_CSI_HOST_4, "pclk_csi_host_4", "pclk_vi_root",
2037 RK_GATE(RK3588_PCLK_CSI_HOST_5, "pclk_csi_host_5", "pclk_vi_root",
2039 RK_GATE(RK3588_ACLK_FISHEYE0, "aclk_fisheye0", "aclk_vi_root",
2041 RK_GATE(RK3588_HCLK_FISHEYE0, "hclk_fisheye0", "hclk_vi_root",
2048 RK_GATE(RK3588_ACLK_FISHEYE1, "aclk_fisheye1", "aclk_vi_root",
2050 RK_GATE(RK3588_HCLK_FISHEYE1, "hclk_fisheye1", "hclk_vi_root",
2062 RK_GATE(RK3588_CLK_ISP0_CORE_MARVIN, "clk_isp0_core_marvin",
2065 RK_GATE(RK3588_CLK_ISP0_CORE_VICAP, "clk_isp0_core_vicap",
2068 RK_GATE(RK3588_ACLK_ISP0, "aclk_isp0", "aclk_vi_root",
2070 RK_GATE(RK3588_HCLK_ISP0, "hclk_isp0", "hclk_vi_root",
2077 RK_GATE(RK3588_ACLK_VICAP, "aclk_vicap", "aclk_vi_root",
2079 RK_GATE(RK3588_HCLK_VICAP, "hclk_vicap", "hclk_vi_root",
2106 RK_GATE(RK3588_PCLK_DP0, "pclk_dp0", "pclk_vo0_root",
2108 RK_GATE(RK3588_PCLK_DP1, "pclk_dp1", "pclk_vo0_root",
2110 RK_GATE(RK3588_PCLK_S_DP0, "pclk_s_dp0", "pclk_vo0_s_root",
2112 RK_GATE(RK3588_PCLK_S_DP1, "pclk_s_dp1", "pclk_vo0_s_root",
2114 RK_GATE(RK3588_CLK_DP0, "clk_dp0", "aclk_vo0_root",
2116 RK_GATE(RK3588_CLK_DP1, "clk_dp1", "aclk_vo0_root",
2118 RK_GATE(RK3588_HCLK_HDCP_KEY0, "hclk_hdcp_key0", "hclk_vo0_s_root",
2120 RK_GATE(RK3588_PCLK_HDCP0, "pclk_hdcp0", "pclk_vo0_root",
2122 RK_GATE(RK3588_ACLK_TRNG0, "aclk_trng0", "aclk_vo0_root",
2124 RK_GATE(RK3588_PCLK_TRNG0, "pclk_trng0", "pclk_vo0_root",
2126 RK_GATE(RK3588_PCLK_VO0GRF, "pclk_vo0grf", "pclk_vo0_root",
2140 RK_GATE(RK3588_MCLK_I2S4_8CH_TX, "mclk_i2s4_8ch_tx", "clk_i2s4_8ch_tx",
2154 RK_GATE(RK3588_MCLK_I2S8_8CH_TX, "mclk_i2s8_8ch_tx", "clk_i2s8_8ch_tx",
2167 RK_GATE(RK3588_MCLK_SPDIF2_DP0, "mclk_spdif2_dp0", "clk_spdif2_dp0",
2169 RK_GATE(RK3588_MCLK_SPDIF2, "mclk_spdif2", "clk_spdif2_dp0",
2182 RK_GATE(RK3588_MCLK_SPDIF5_DP1, "mclk_spdif5_dp1", "clk_spdif5_dp1",
2184 RK_GATE(RK3588_MCLK_SPDIF5, "mclk_spdif5", "clk_spdif5_dp1",
2263 RK_GATE(RK3588_PCLK_EDP0, "pclk_edp0", "pclk_vo1_root",
2265 RK_GATE(RK3588_CLK_EDP0_24M, "clk_edp0_24m", "xin24m",
2272 RK_GATE(RK3588_PCLK_EDP1, "pclk_edp1", "pclk_vo1_root",
2274 RK_GATE(RK3588_CLK_EDP1_24M, "clk_edp1_24m", "xin24m",
2281 RK_GATE(RK3588_HCLK_HDCP_KEY1, "hclk_hdcp_key1", "hclk_vo1_s_root",
2283 RK_GATE(RK3588_PCLK_HDCP1, "pclk_hdcp1", "pclk_vo1_root",
2285 RK_GATE(RK3588_ACLK_HDMIRX, "aclk_hdmirx", "aclk_hdmirx_root",
2287 RK_GATE(RK3588_PCLK_HDMIRX, "pclk_hdmirx", "pclk_vo1_root",
2289 RK_GATE(RK3588_CLK_HDMIRX_REF, "clk_hdmirx_ref", "aclk_hdcp1_root",
2300 RK_GATE(RK3588_CLK_HDMIRX_AUD, "clk_hdmirx_aud", "clk_hdmirx_aud_mux",
2302 RK_GATE(RK3588_PCLK_HDMITX0, "pclk_hdmitx0", "pclk_vo1_root",
2309 RK_GATE(RK3588_CLK_HDMITX0_REF, "clk_hdmitx0_ref", "aclk_hdcp1_root",
2311 RK_GATE(RK3588_PCLK_HDMITX1, "pclk_hdmitx1", "pclk_vo1_root",
2318 RK_GATE(RK3588_CLK_HDMITX1_REF, "clk_hdmitx1_ref", "aclk_hdcp1_root",
2320 RK_GATE(RK3588_ACLK_TRNG1, "aclk_trng1", "aclk_hdcp1_root",
2322 RK_GATE(RK3588_PCLK_TRNG1, "pclk_trng1", "pclk_vo1_root",
2324 RK_GATE(0, "pclk_vo1grf", "pclk_vo1_root",
2326 RK_GATE(RK3588_PCLK_S_EDP0, "pclk_s_edp0", "pclk_vo1_s_root",
2328 RK_GATE(RK3588_PCLK_S_EDP1, "pclk_s_edp1", "pclk_vo1_s_root",
2330 RK_GATE(RK3588_PCLK_S_HDMIRX, "pclk_s_hdmirx", "pclk_vo1_s_root",
2344 RK_GATE(RK3588_MCLK_I2S10_8CH_RX, "mclk_i2s10_8ch_rx",
2359 RK_GATE(RK3588_MCLK_I2S7_8CH_RX, "mclk_i2s7_8ch_rx", "clk_i2s7_8ch_rx",
2373 RK_GATE(RK3588_MCLK_I2S9_8CH_RX, "mclk_i2s9_8ch_rx", "clk_i2s9_8ch_rx",
2387 RK_GATE(RK3588_MCLK_I2S5_8CH_TX, "mclk_i2s5_8ch_tx", "clk_i2s5_8ch_tx",
2401 RK_GATE(RK3588_MCLK_I2S6_8CH_TX, "mclk_i2s6_8ch_tx", "clk_i2s6_8ch_tx",
2415 RK_GATE(RK3588_MCLK_I2S6_8CH_RX, "mclk_i2s6_8ch_rx", "clk_i2s6_8ch_rx",
2431 RK_GATE(RK3588_MCLK_SPDIF3, "mclk_spdif3", "clk_spdif3",
2444 RK_GATE(RK3588_MCLK_SPDIF4, "mclk_spdif4", "clk_spdif4",
2461 RK_GATE(RK3588_CLK_HDMIHDP0, "clk_hdmihdp0", "xin24m",
2463 RK_GATE(RK3588_CLK_HDMIHDP1, "clk_hdmihdp1", "xin24m",
2465 RK_GATE(RK3588_PCLK_HDPTX0, "pclk_hdptx0", "pclk_top_root",
2467 RK_GATE
2469 RK_GATE(RK3588_PCLK_USBDPPHY0, "pclk_usbdpphy0", "pclk_top_root",
2471 RK_GATE(RK3588_PCLK_USBDPPHY1, "pclk_usbdpphy1", "pclk_top_root",
2473 RK_GATE(RK3588_HCLK_VOP, "hclk_vop", "hclk_vop_root",
2475 RK_GATE(RK3588_ACLK_VOP, "aclk_vop", "aclk_vop_sub_src",
2512 RK_GATE(RK3588_PCLK_DSIHOST0, "pclk_dsihost0", "pclk_vop_root",
2514 RK_GATE(RK3588_PCLK_DSIHOST1, "pclk_dsihost1", "pclk_vop_root",
2526 RK_GATE(RK3588_CLK_VOP_PMU, "clk_vop_pmu", "xin24m",
2528 RK_GATE(RK3588_ACLK_VOP_DOBY, "aclk_vop_doby", "aclk_vop_root",
2530 RK_GATE(RK3588_CLK_USBDP_PHY0_IMMORTAL, "clk_usbdp_phy0_immortal",
2533 RK_GATE(RK3588_CLK_USBDP_PHY1_IMMORTAL, "clk_usbdp_phy1_immortal",
2536 RK_GATE(RK3588_CLK_REF_PIPE_PHY0_OSC_SRC, "clk_ref_pipe_phy0_osc_src",
2539 RK_GATE(RK3588_CLK_REF_PIPE_PHY1_OSC_SRC, "clk_ref_pipe_phy1_osc_src",
2542 RK_GATE(RK3588_CLK_REF_PIPE_PHY2_OSC_SRC, "clk_ref_pipe_phy2_osc_src",
2604 RK_GATE(RK3588_PCLK_PMU0_ROOT, "pclk_pmu0_root", "pclk_pmu1_root",
2611 RK_GATE(RK3588_CLK_PMU0, "clk_pmu0", "xin24m",
2613 RK_GATE(RK3588_PCLK_PMU0, "pclk_pmu0", "pclk_pmu0_root",
2615 RK_GATE(RK3588_PCLK_PMU0IOC, "pclk_pmu0ioc", "pclk_pmu0_root",
2617 RK_GATE(RK3588_PCLK_GPIO0, "pclk_gpio0", "pclk_pmu0_root",
2624 RK_GATE(RK3588_PCLK_I2C0, "pclk_i2c0", "pclk_pmu0_root",
2631 RK_GATE(RK3588_HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_pmu1_root",
2645 RK_GATE(RK3588_MCLK_I2S1_8CH_TX, "mclk_i2s1_8ch_tx", "clk_i2s1_8ch_tx",
2659 RK_GATE(RK3588_MCLK_I2S1_8CH_RX, "mclk_i2s1_8ch_rx", "clk_i2s1_8ch_rx",
2664 RK_GATE(RK3588_PCLK_PMU1, "pclk_pmu1", "pclk_pmu0_root",
2666 RK_GATE(RK3588_CLK_DDR_FAIL_SAFE, "clk_ddr_fail_safe", "clk_pmu0",
2668 RK_GATE(RK3588_CLK_PMU1, "clk_pmu1", "clk_pmu0",
2670 RK_GATE(RK3588_HCLK_PDM0, "hclk_pdm0", "hclk_pmu1_root",
2677 RK_GATE(RK3588_HCLK_VAD, "hclk_vad", "hclk_pmu1_root",
2679 RK_GATE(RK3588_FCLK_PMU_CM0_CORE, "fclk_pmu_cm0_core",
2687 RK_GATE(RK3588_PCLK_PMU1_IOC, "pclk_pmu1_ioc", "pclk_pmu0_root",
2689 RK_GATE(RK3588_PCLK_PMU1PWM, "pclk_pmu1pwm", "pclk_pmu0_root",
2696 RK_GATE(RK3588_CLK_PMU1PWM_CAPTURE, "clk_pmu1pwm_capture", "xin24m",
2698 RK_GATE(RK3588_PCLK_PMU1TIMER, "pclk_pmu1timer", "pclk_pmu0_root",
2705 RK_GATE(RK3588_CLK_PMU1TIMER0, "clk_pmu1timer0", "clk_pmu1timer_root",
2707 RK_GATE(RK3588_CLK_PMU1TIMER1, "clk_pmu1timer1", "clk_pmu1timer_root",
2719 RK_GATE(RK3588_SCLK_UART0, "sclk_uart0", "clk_uart0",
2721 RK_GATE(RK3588_PCLK_UART0, "pclk_uart0", "pclk_pmu0_root",
2723 RK_GATE(RK3588_PCLK_PMU1WDT, "pclk_pmu1wdt", "pclk_pmu0_root",
2745 RK_GATE(RK3588_CLK_PHY0_REF_ALT_P, "clk_phy0_ref_alt_p", "ppll",
2747 RK_GATE(RK3588_CLK_PHY0_REF_ALT_M, "clk_phy0_ref_alt_m", "ppll",
2749 RK_GATE(RK3588_CLK_PHY1_REF_ALT_P, "clk_phy1_ref_alt_p", "ppll",
2751 RK_GATE(RK3588_CLK_PHY1_REF_ALT_M, "clk_phy1_ref_alt_m", "ppll",
2753 RK_GATE(RK3588_HCLK_SPDIFRX0, "hclk_spdifrx0", "hclk_vo1",
2755 RK_GATE(RK3588_HCLK_SPDIFRX1, "hclk_spdifrx1", "hclk_vo1",
2757 RK_GATE(RK3588_HCLK_SPDIFRX2, "hclk_spdifrx2", "hclk_vo1",
2759 RK_GATE(RK3588_HCLK_SPDIF4, "hclk_spdif4", "hclk_vo1",
2761 RK_GATE(RK3588_HCLK_SPDIF3, "hclk_spdif3", "hclk_vo1",
2763 RK_GATE(RK3588_HCLK_I2S6_8CH, "hclk_i2s6_8ch", "hclk_vo1",
2765 RK_GATE(RK3588_HCLK_I2S5_8CH, "hclk_i2s5_8ch", "hclk_vo1",
2767 RK_GATE(RK3588_HCLK_I2S9_8CH, "hclk_i2s9_8ch", "hclk_vo1",
2769 RK_GATE(RK3588_HCLK_I2S7_8CH, "hclk_i2s7_8ch", "hclk_vo1",
2771 RK_GATE(RK3588_HCLK_I2S10_8CH, "hclk_i2s10_8ch", "hclk_vo1",
2773 RK_GATE(RK3588_ACLK_HDCP1, "aclk_hdcp1", "aclk_hdcp1_pre",
2775 RK_GATE(RK3588_HCLK_HDCP1, "hclk_hdcp1", "hclk_vo1",
2777 RK_GATE(RK3588_HCLK_SPDIF5_DP1, "hclk_spdif5_dp1", "hclk_vo0",
2779 RK_GATE(RK3588_HCLK_SPDIF2_DP0, "hclk_spdif2_dp0", "hclk_vo0",
2781 RK_GATE(RK3588_HCLK_I2S8_8CH, "hclk_i2s8_8ch", "hclk_vo0",
2783 RK_GATE(RK3588_HCLK_I2S4_8CH, "hclk_i2s4_8ch", "hclk_vo0",
2785 RK_GATE(RK3588_ACLK_HDCP0, "aclk_hdcp0", "aclk_hdcp0_pre",
2787 RK_GATE(RK3588_HCLK_HDCP0, "hclk_hdcp0", "hclk_vo0",
2789 RK_GATE(RK3588_HCLK_RKVENC1, "hclk_rkvenc1", "hclk_rkvenc1_pre",
2791 RK_GATE(RK3588_ACLK_RKVENC1, "aclk_rkvenc1", "aclk_rkvenc1_pre",
2793 RK_GATE(RK3588_ACLK_VPU, "aclk_vpu", "aclk_vdpu_low_pre",
2795 RK_GATE(RK3588_ACLK_IEP2P0, "aclk_iep2p0", "aclk_vdpu_low_pre",
2797 RK_GATE(RK3588_ACLK_JPEG_ENCODER0, "aclk_jpeg_encoder0",
2800 RK_GATE(RK3588_ACLK_JPEG_ENCODER1, "aclk_jpeg_encoder1",
2803 RK_GATE(RK3588_ACLK_JPEG_ENCODER2, "aclk_jpeg_encoder2",
2806 RK_GATE(RK3588_ACLK_JPEG_ENCODER3, "aclk_jpeg_encoder3",
2809 RK_GATE(RK3588_ACLK_JPEG_DECODER, "aclk_jpeg_decoder",
2812 RK_GATE(RK3588_ACLK_USB3OTG1, "aclk_usb3otg1", "aclk_usb",
2814 RK_GATE(RK3588_HCLK_HOST0, "hclk_host0", "hclk_usb",
2816 RK_GATE(RK3588_HCLK_HOST_ARB0, "hclk_host_arb0", "hclk_usb",
2818 RK_GATE(RK3588_HCLK_HOST1, "hclk_host1", "hclk_usb",
2820 RK_GATE(RK3588_HCLK_HOST_ARB1, "hclk_host_arb1", "hclk_usb",
2822 RK_GATE(RK3588_ACLK_USB3OTG0, "aclk_usb3otg0", "aclk_usb",
2824 RK_GATE(RK3588_HCLK_SDIO, "hclk_sdio", "hclk_sdio_pre",
2826 RK_GATE(RK3588_HCLK_RKVDEC1, "hclk_rkvdec1", "hclk_rkvdec1_pre",
2828 RK_GATE(RK3588_ACLK_RKVDEC1, "aclk_rkvdec1", "aclk_rkvdec1_pre",
2830 RK_GATE(RK3588_HCLK_RKVDEC0, "hclk_rkvdec0", "hclk_rkvdec0_pre",
2832 RK_GATE(RK3588_ACLK_RKVDEC0, "aclk_rkvdec0", "aclk_rkvdec0_pre",
2834 RK_GATE(RK3588_CLK_PCIE4L_PIPE, "clk_pcie4l_pipe",
2837 RK_GATE(RK3588_CLK_PCIE2L_PIPE, "clk_pcie2l_pipe",
2840 RK_GATE(RK3588_CLK_PIPEPHY0_PIPE_G, "clk_pipephy0_pipe_g",
2843 RK_GATE(RK3588_CLK_PIPEPHY1_PIPE_G, "clk_pipephy1_pipe_g",
2846 RK_GATE(RK3588_CLK_PIPEPHY2_PIPE_G, "clk_pipephy2_pipe_g",
2849 RK_GATE(RK3588_CLK_PIPEPHY0_PIPE_ASIC_G, "clk_pipephy0_pipe_asic_g",
2852 RK_GATE(RK3588_CLK_PIPEPHY1_PIPE_ASIC_G, "clk_pipephy1_pipe_asic_g",
2855 RK_GATE(RK3588_CLK_PIPEPHY2_PIPE_ASIC_G, "clk_pipephy2_pipe_asic_g",
2858 RK_GATE(RK3588_CLK_PIPEPHY2_PIPE_U3_G, "clk_pipephy2_pipe_u3_g",
2861 RK_GATE(RK3588_CLK_PCIE1L2_PIPE, "clk_pcie1l2_pipe",
2864 RK_GATE(RK3588_CLK_PCIE1L0_PIPE, "clk_pcie1l0_pipe",
2867 RK_GATE(RK3588_CLK_PCIE1L1_PIPE, "clk_pcie1l1_pipe",
2870 RK_GATE(RK3588_HCLK_SFC, "hclk_sfc", "hclk_nvm",
2872 RK_GATE(RK3588_HCLK_SFC_XIP, "hclk_sfc_xip", "hclk_nvm",
2874 RK_GATE
2876 RK_GATE(RK3588_ACLK_ISP1, "aclk_isp1", "aclk_isp1_pre",
2878 RK_GATE(RK3588_HCLK_ISP1, "hclk_isp1", "hclk_isp1_pre",
2880 RK_GATE(RK3588_PCLK_AV1, "pclk_av1", "pclk_av1_pre",
2882 RK_GATE(RK3588_ACLK_AV1, "aclk_av1", "aclk_av1_pre",
Indexes created Thu Oct 23 22:10:10 GMT 2025