Lines Matching defs:CLK_GATE
322 #define CLK_GATE(_name, _parent, _reg, _bits, _f) { \
517 CLK_GATE("aclk200_fsys", "mout_user_aclk200_fsys", EXYNOS5422_GATE_BUS_FSYS0,
519 CLK_GATE("aclk200_fsys2", "mout_user_aclk200_fsys2", EXYNOS5422_GATE_BUS_FSYS0,
522 CLK_GATE("sclk_mmc0", "dout_mmc0", EXYNOS5422_GATE_TOP_SCLK_FSYS,
524 CLK_GATE("sclk_mmc1", "dout_mmc1", EXYNOS5422_GATE_TOP_SCLK_FSYS,
526 CLK_GATE("sclk_mmc2", "dout_mmc2", EXYNOS5422_GATE_TOP_SCLK_FSYS,
528 CLK_GATE("sclk_usbphy301", "dout_usbphy301", EXYNOS5422_GATE_TOP_SCLK_FSYS,
530 CLK_GATE("sclk_usbphy300", "dout_usbphy300", EXYNOS5422_GATE_TOP_SCLK_FSYS,
532 CLK_GATE("sclk_usbd300", "dout_usbd300", EXYNOS5422_GATE_TOP_SCLK_FSYS,
534 CLK_GATE("sclk_usbd301", "dout_usbd301", EXYNOS5422_GATE_TOP_SCLK_FSYS,
536 CLK_GATE("sclk_uart0", "dout_uart0", EXYNOS5422_GATE_TOP_SCLK_PERIC,
538 CLK_GATE("sclk_uart1", "dout_uart1", EXYNOS5422_GATE_TOP_SCLK_PERIC,
540 CLK_GATE("sclk_uart2", "dout_uart2", EXYNOS5422_GATE_TOP_SCLK_PERIC,
542 CLK_GATE("sclk_uart3", "dout_uart3", EXYNOS5422_GATE_TOP_SCLK_PERIC,
545 CLK_GATE("mmc0", "aclk200_fsys2", EXYNOS5422_GATE_IP_FSYS,
547 CLK_GATE("mmc1", "aclk200_fsys2", EXYNOS5422_GATE_IP_FSYS,
549 CLK_GATE("mmc2", "aclk200_fsys2", EXYNOS5422_GATE_IP_FSYS,
551 CLK_GATE("usbh20", "aclk200_fsys", EXYNOS5422_GATE_IP_FSYS,
553 CLK_GATE("usbd300", "aclk200_fsys", EXYNOS5422_GATE_IP_FSYS,
555 CLK_GATE("usbd301", "aclk200_fsys", EXYNOS5422_GATE_IP_FSYS,
558 CLK_GATE("uart0", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
560 CLK_GATE("uart1", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
562 CLK_GATE("uart2", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
564 CLK_GATE("uart3", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
566 CLK_GATE("i2c0", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
568 CLK_GATE("i2c1", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
570 CLK_GATE("i2c2", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
572 CLK_GATE("i2c3", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
574 CLK_GATE("i2c_hdmi", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
576 CLK_GATE("pwm", "mout_user_aclk66_peric", EXYNOS5422_GATE_IP_PERIC,
Indexes created Sun Oct 12 09:09:55 GMT 2025