Cross Reference: /src/sys/arch/arm/sunxi/sunxi

Lines Matching defs:phy
42 /* PHY control registers */
59 /* PHY registers */
89 	{ .compat = "allwinner,sun4i-a10-usb-phy",	.value = USBPHY_A10 },
90 	{ .compat = "allwinner,sun5i-a13-usb-phy",	.value = USBPHY_A13 },
91 	{ .compat = "allwinner,sun6i-a31-usb-phy",	.value = USBPHY_A31 },
92 	{ .compat = "allwinner,sun7i-a20-usb-phy",	.value = USBPHY_A20 },
93 	{ .compat = "allwinner,sun8i-a83t-usb-phy",	.value = USBPHY_A83T },
94 	{ .compat = "allwinner,sun8i-h3-usb-phy",	.value = USBPHY_H3 },
95 	{ .compat = "allwinner,sun8i-v3s-usb-phy",	.value = USBPHY_H3 },
96 	{ .compat = "allwinner,sun20i-d1-usb-phy",	.value = USBPHY_D1 },
97 	{ .compat = "allwinner,sun50i-a64-usb-phy",	.value = USBPHY_A64 },
98 	{ .compat = "allwinner,sun50i-h6-usb-phy",	.value = USBPHY_H6 },
141     struct sunxi_usbphy *phy, u_int bit_addr, u_int bits,
144 	const uint32_t usbc_mask = __BIT(phy->phy_index * 2);
163 		panic("unsupported phy type");
222 	struct sunxi_usbphy * const phy = priv;
254 	if (phy->phy_bsh) {
258 		val = PMU_READ(sc, phy->phy_index, PMU_CFG);
263 		PMU_WRITE(sc, phy->phy_index, PMU_CFG, val);
269 		if (enable && phy->phy_bsh) {
270 			val = PMU_READ(sc, phy->phy_index, PMU_UNK_H3);
272 			PMU_WRITE(sc, phy->phy_index, PMU_UNK_H3, val);
285 			if (phy->phy_index == 0)
286 				sunxi_usbphy_write(sc, phy, PHY_RES45_CAL_EN, 0x1, 1);
287 			sunxi_usbphy_write(sc, phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
288 			sunxi_usbphy_write(sc, phy, PHY_DISCON_TH_SEL, disc_thresh, 2);
293 	if (phy->phy_index == 0) {
318 	if (phy->phy_reg == NULL)
322 		/* If an external vbus is detected, do not enable phy 0 */
323 		if (phy->phy_index == 0 && sunxi_usbphy_vbus_detect(sc))
325 		return fdtbus_regulator_enable(phy->phy_reg);
327 		return fdtbus_regulator_disable(phy->phy_reg);
352 	struct sunxi_usbphy *phy;
364 		aprint_error(": couldn't get phy ctrl registers\n");
368 		aprint_error(": couldn't map phy ctrl registers\n");
373 		phy = &sc->sc_phys[sc->sc_nphys];
374 		phy->phy_index = sc->sc_nphys;
378 		} else if (bus_space_map(sc->sc_bst, addr, size, 0, &phy->phy_bsh) != 0) {
384 		phy->phy_reg = fdtbus_regulator_acquire(phandle, pname);
401 	aprint_normal(": USB PHY\n");
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