Lines Matching defs:npe
34 * Intel XScale NPE Ethernet driver.
38 * (NPE's) that work together with a MAC and PHY. The MAC
40 * the MAC. NPE-XScale communication happens through h/w
47 * XXX NPE-C port doesn't work yet
92 struct npehwbuf *hwbuf; /* NPE h/w buffers */
107 struct ixpnpe_softc *sc_npe; /* NPE support */
127 * rx free Q id's are fixed by the NPE microcode. The
138 int npeid; /* NPE assignment */
140 uint32_t imageid; /* NPE firmware image id */
150 { .desc = "IXP NPE-B",
163 { .desc = "IXP NPE-C",
248 CFATTACH_DECL_NEW(npe, sizeof(struct npe_softc),
285 "Failed to activate NPE (missing microcode?)\n");
474 struct npebuf *npe = &dma->buf[i];
478 npe->ix_neaddr = dma->buf_phys +
480 KASSERT((npe->ix_neaddr & 0x1f) == 0);
482 MCLBYTES, 0, 0, &npe->ix_map);
490 npe->ix_hw = hw;
507 struct npebuf *npe = &dma->buf[i];
508 bus_dmamap_destroy(sc->sc_dt, npe->ix_map);
528 /* load NPE firmware and start it running */
611 * The NPE handles the actual tx/rx process and the q manager
625 /* tell the NPE to direct all traffic to rx_qid */
718 * split the NPE msg processing into two parts. The
797 * txdone q wired into it so we must use the NPE ID
807 struct npebuf *npe;
811 /* XXX no NPE-A support */
817 DPRINTF(sc, "%s: entry 0x%x NPE %u port %u\n",
821 npe = P2V(NPE_QM_Q_ADDR(entry), &sc->txdma);
822 m_freem(npe->ix_m);
823 npe->ix_m = NULL;
826 *td->tail = npe;
827 td->tail = &npe->ix_next;
855 npe_rxbuf_init(struct npe_softc *sc, struct npebuf *npe, struct mbuf *m)
870 error = bus_dmamap_load_mbuf(sc->sc_dt, npe->ix_map, m,
876 hw = npe->ix_hw;
877 hw->ix_ne[0].data = htobe32(npe->ix_map->dm_segs[0].ds_addr);
878 /* NB: NPE requires length be a multiple of 64 */
880 hw->ix_ne[0].len = htobe32(npe->ix_map->dm_segs[0].ds_len << 16);
882 npe->ix_m = m;
884 bus_dmamap_sync(sc->sc_dt, npe->ix_map, 0, npe->ix_map->dm_mapsize,
890 * RX q processing for a specific NPE. Claim entries
904 struct npebuf *npe = P2V(NPE_QM_Q_ADDR(entry), dma);
908 __func__, entry, npe->ix_neaddr, npe->ix_hw->ix_ne[0].len);
920 struct mbuf *mrx = npe->ix_m;
921 struct npehwbuf *hw = npe->ix_hw;
925 bus_dmamap_sync(sc->sc_dt, npe->ix_map, 0,
926 npe->ix_map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1028 * NPE always adds the FCS by this driver's setting,
1041 m = npe->ix_m;
1043 if (npe_rxbuf_init(sc, npe, m) == 0) {
1044 /* return npe buf to rx free list */
1045 ixpqmgr_qwrite(sc->rx_freeqid, npe->ix_neaddr);
1061 struct npebuf *npe = &dma->buf[i];
1062 if (npe->ix_m != NULL) {
1066 m_freem(npe->ix_m);
1068 npe->ix_m = NULL;
1069 npe->ix_next = sc->tx_free;
1070 sc->tx_free = npe;
1078 struct npebuf *npe;
1082 npe = &dma->buf[i];
1083 npe_rxbuf_init(sc, npe, npe->ix_m);
1084 /* Set npe buf on rx free list */
1085 ixpqmgr_qwrite(sc->rx_freeqid, npe->ix_neaddr);
1113 /* Thresholds determined by NPE firmware FS */
1236 struct npebuf *npe;
1250 npe = sc->tx_free;
1251 error = bus_dmamap_load_mbuf(sc->sc_dt, npe->ix_map, m,
1262 error = bus_dmamap_load_mbuf(sc->sc_dt, npe->ix_map,
1271 sc->tx_free = npe->ix_next;
1278 bus_dmamap_sync(sc->sc_dt, npe->ix_map, 0,
1279 npe->ix_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1281 npe->ix_m = m;
1282 hw = npe->ix_hw;
1284 nseg = npe->ix_map->dm_nsegs;
1285 segs = npe->ix_map->dm_segs;
1286 next = npe->ix_neaddr + sizeof(hw->ix_ne[0]);
1299 __func__, sc->tx_qid, npe->ix_neaddr,
1303 ixpqmgr_qwrite(sc->tx_qid, npe->ix_neaddr);
1317 struct npebuf *npe = &dma->buf[i];
1319 if (npe->ix_m != NULL) {
1320 bus_dmamap_unload(sc->sc_dt, npe->ix_map);
1321 m_freem(npe->ix_m);
1322 npe->ix_m = NULL;
1335 struct npebuf *npe = &dma->buf[i];
1337 if (npe->ix_m != NULL) {
1338 bus_dmamap_unload(sc->sc_dt, npe->ix_map);
1339 m_freem(npe->ix_m);
1340 npe->ix_m = NULL;
1493 * Update and reset the statistics in the NPE.
1549 * NB: ixp425 has one PHY per NPE
Indexes created Thu Oct 02 10:09:58 GMT 2025