Cross Reference: /src/sys/arch/arm/xscale/pxa2x0

Lines Matching refs:ds
413 	struct dmac_dmover_state *ds;
429 		ds = &dd->dd_state[i];
430 		ds->ds_sc = sc;
431 		ds->ds_current = NULL;
432 		ds->ds_xfer.dxs_cookie = ds;
433 		ds->ds_xfer.dxs_done = dmac_dmover_done;
434 		ds->ds_xfer.dxs_priority = DMAC_PRIORITY_NORMAL;
435 		ds->ds_xfer.dxs_peripheral = DMAC_PERIPH_NONE;
436 		ds->ds_xfer.dxs_flow = DMAC_FLOW_CTRL_NONE;
437 		ds->ds_xfer.dxs_dev_width = DMAC_DEV_WIDTH_DEFAULT;
438 		ds->ds_xfer.dxs_burst_size = DMAC_BURST_SIZE_8;	/* XXX */
439 		ds->ds_xfer.dxs_loop_notify = DMAC_DONT_LOOP;
440 		ds->ds_src_addr_hold = false;
441 		ds->ds_dst_addr_hold = false;
442 		ds->ds_src_nsegs = 0;
443 		ds->ds_dst_nsegs = 0;
444 		LIST_INSERT_HEAD(&dd->dd_free, ds, ds_link);
452 				&ds->ds_src_dmap) ||
456 				&ds->ds_dst_dmap)) {
468 				&ds->ds_zero_seg, 1, &dummy, BUS_DMA_NOWAIT) ||
471 				&ds->ds_fill_seg, 1, &dummy, BUS_DMA_NOWAIT)) {
475 		if (bus_dmamem_map(sc->sc_dmat, &ds->ds_zero_seg, 1,
476 				arm_pcache.dcache_line_size, &ds->ds_zero_va,
478 		    bus_dmamem_map(sc->sc_dmat, &ds->ds_fill_seg, 1,
479 				arm_pcache.dcache_line_size, &ds->ds_fill_va,
487 		memset(ds->ds_zero_va, 0, arm_pcache.dcache_line_size);
513 	struct dmac_dmover_state *ds;
525 	    (ds = LIST_FIRST(&dd->dd_free)) != NULL) {
532 		LIST_REMOVE(ds, ds_link);
533 		ds->ds_current = dreq;
560 				if (bus_dmamap_load(sc->sc_dmat,ds->ds_src_dmap,
575 				    ds->ds_src_dmap, uio,
585 			ds->ds_src_addr_hold = false;
593 			if (bus_dmamap_load(sc->sc_dmat, ds->ds_src_dmap,
594 			    ds->ds_zero_va, arm_pcache.dcache_line_size, NULL,
598 			ds->ds_src_addr_hold = true;
610 			memset(ds->ds_fill_va, dreq->dreq_immediate[0],
613 			if (bus_dmamap_load(sc->sc_dmat, ds->ds_src_dmap,
614 			    ds->ds_fill_va, arm_pcache.dcache_line_size, NULL,
618 			ds->ds_src_addr_hold = true;
628 			if (bus_dmamap_load(sc->sc_dmat, ds->ds_dst_dmap,
638 			if (bus_dmamap_load_uio(sc->sc_dmat, ds->ds_dst_dmap,
646 			bus_dmamap_unload(sc->sc_dmat, ds->ds_src_dmap);
650 			ds->ds_current = NULL;
651 			LIST_INSERT_HEAD(&dd->dd_free, ds, ds_link);
660 		bus_dmamap_sync(sc->sc_dmat, ds->ds_src_dmap, 0,
661 		    ds->ds_src_dmap->dm_mapsize, BUS_DMASYNC_PREWRITE);
662 		ds->ds_src_dma_segs = ds->ds_src_dmap->dm_segs;
663 		ds->ds_src_nsegs = ds->ds_src_dmap->dm_nsegs;
665 		bus_dmamap_sync(sc->sc_dmat, ds->ds_dst_dmap, 0,
666 		    ds->ds_dst_dmap->dm_mapsize, BUS_DMASYNC_PREREAD);
667 		ds->ds_dst_dma_segs = ds->ds_dst_dmap->dm_segs;
668 		ds->ds_dst_nsegs = ds->ds_dst_dmap->dm_nsegs;
673 		if ((rv = pxa2x0_dmac_start_xfer(&ds->ds_xfer.dxs_xfer)) != 0) {
674 			bus_dmamap_unload(sc->sc_dmat, ds->ds_src_dmap);
675 			bus_dmamap_unload(sc->sc_dmat, ds->ds_dst_dmap);
678 			ds->ds_current = NULL;
679 			LIST_INSERT_HEAD(&dd->dd_free, ds, ds_link);
691 	struct dmac_dmover_state *ds = dx->dx_cookie;
692 	struct pxadmac_softc *sc = ds->ds_sc;
693 	struct dmover_request *dreq = ds->ds_current;
704 	bus_dmamap_sync(sc->sc_dmat, ds->ds_src_dmap, 0,
705 	    ds->ds_src_dmap->dm_mapsize, BUS_DMASYNC_POSTREAD);
706 	bus_dmamap_sync(sc->sc_dmat, ds->ds_dst_dmap, 0,
707 	    ds->ds_dst_dmap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
709 	bus_dmamap_unload(sc->sc_dmat, ds->ds_src_dmap);
710 	bus_dmamap_unload(sc->sc_dmat, ds->ds_dst_dmap);
712 	ds->ds_current = NULL;
713 	LIST_INSERT_HEAD(&sc->sc_dmover.dd_free, ds, ds_link);
810 dmac_init_desc(struct dmac_desc_segs *ds, struct dmac_xfer_desc *xd,
818 	ds->ds_curseg = xd->xd_dma_segs;
819 	ds->ds_nsegs = xd->xd_nsegs;
820 	ds->ds_offset = 0;
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