Lines Matching refs:word
119 .word 0x115f3fee /* mrc p15, 1, r5, c15, c1, 0 */
120 .word 0x0155c5e3 /* bic r5, r5, #0x400000 */
121 .word 0x115f2fee /* mcr p15, 1, r5, c15, c1, 0 */
124 .word 0x0000a0e1 /* nop */
125 .word 0x0000a0e1 /* nop */
126 .word 0x0000a0e1 /* nop */
130 .word 0x104f11ee /* mrc p15, 0, r4, c1, c0, 0 */
131 .word 0x804084e3 /* orr r4, r4, #CPU_CONTROL_BEND_ENABLE */
132 .word 0x104f01ee /* mcr p15, 0, r4, c1, c0, 0 */
135 .word 0x0000a0e1 /* nop */
136 .word 0x0000a0e1 /* nop */
137 .word 0x0000a0e1 /* nop */
199 .word MVSOC_FIXUP_DEVID
201 .word MARVELL_INTERREGS_PBASE
257 .word start
263 .word STARTUP_PAGETABLE_ADDR
270 .word CPU_ID_MV88SV131, SHEEVA
271 .word CPU_ID_MV88FR571_VD, SHEEVA /* Is it Sheeva? */
272 .word CPU_ID_MV88SV581X_V6, PJ4B
273 .word CPU_ID_MV88SV581X_V7, PJ4B
274 .word CPU_ID_MV88SV584X_V7, PJ4B
275 .word CPU_ID_ARM_88SV581X_V6, PJ4B
276 .word CPU_ID_ARM_88SV581X_V7, PJ4B
277 .word 0, 0
281 .word n_sec ; \
282 .word 4 * (((va) & 0xffffffff) >> L1_S_SHIFT) ; \
283 .word ((pa) & 0xffffffff) | (attr) ;
298 .word 0 /* end of table */