Lines Matching refs:pu
59 pu: .equ 3 /* upper part of product */
72 stws,ma pu,4(%sp) ; save registers on stack
89 addi 0,gr0,pu ; clear product
98 sh4n: shd pu,pl,4,pl ; shift product right 4 bits
100 extru pu,27,28,pu ; <= zero
114 shd pu,pl,4,pl ; product right 4 bits
118 addb,tr op1,pu,sh4n+4 ; add op1 to product, to shift
119 shd pu,pl,4,pl ; product right 4 bits
123 addb,tr op1,pu,sh4n ; add 2*op1, to shift
124 addb,uv op1,pu,sh4c ; product right 4 bits
128 addb,tr op1,pu,sh4n-4 ; add op1 & 2*op1, shift
129 sh1add,nsv op1,pu,pu ; product right 4 bits
134 shd pu,pl,2,pl ; shift product 2 bits
138 addb,tr op1,pu,sh2us ; add op1 to product
139 shd pu,pl,2,pl ; shift 2 bits
143 addb,tr op1,pu,sh2c ; add 2*op1, to shift 2 bits
144 addb,nuv op1,pu,sh2us ; br. if not overflow
149 sub pu,op1,pu ; subtract op1, br. to sh3s
155 shd pu,pl,3,pl ; shift product right 3 bits
159 addb,tr op1,pu,sh3us ; add op1, to shift 3, add op1,
160 shd pu,pl,3,pl ; and shift 1
164 addb,tr op1,pu,sh3c ; add 2*op1, to shift 3 bits
165 addb,nuv op1,pu,sh3us ; br. if no overflow
170 sub pu,op1,pu ; shift 2 with minus sign
175 shd pu,pl,2,pl ; shift right 2 bits signed
179 addb,tr op1,pu,sh2ns ; add op1, to shift 2
180 shd pu,pl,2,pl ; right 2 unsigned, etc.
185 shd pu,pl,1,pl ; shift 1 bit
190 sub pu,op1,pu ; to shift 4 signed
196 shd pu,pl,4,pl ; shift 4 signed
200 sh4s: shd pu,pl,4,pl
202 shd pm,pu,4,pu ; shift 4, minus signed
205 shd pc,pu,4,pu ; shift 4 with overflow
219 mmax: extrs op1,30,31,pu
231 sh3c: shd pu,pl,3,pl ; shift product 3 bits
232 shd pc,pu,3,pu ; shift 3 signed
233 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
234 shd pu,pl,1,pl
236 sh3us: extru pu,28,29,pu ; shift 3 unsigned
237 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
238 shd pu,pl,1,pl
240 sh3sa: extrs pu,28,29,pu ; shift 3 signed
241 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
242 shd pu,pl,1,pl
244 sh3s: shd pu,pl,3,pl ; shift 3 minus signed
245 shd pm,pu,3,pu
246 addb,tr op1,pu,sh1 ; add op1, to shift 1 bit
247 shd pu,pl,1,pl
250 extru pu,30,31,pu
255 extru pu,29,30,pu ; shift unsigned
257 sh2s: shd pu,pl,2,pl ; shift with minus sign
258 shd pm,pu,2,pu ;
259 sub pu,op1,pu ; subtract op1
260 shd pu,pl,2,pl ; shift with minus sign
262 shd pm,pu,2,pu ; shift with minus sign
265 sh2sb: extrs pu,29,30,pu ; shift 2 signed
266 sub pu,op1,pu ; subtract op1 from product
267 shd pu,pl,2,pl ; shift with minus sign
269 shd pm,pu,2,pu ; shift with minus sign
272 sh1sa: extrs pu,30,31,pu ; signed
273 sub pu,op1,pu ; subtract op1 from product
274 shd pu,pl,3,pl ; shift 3 with minus sign
276 shd pm,pu,3,pu ; count never reaches 0 here
280 sh2us: extru pu,29,30,pu ; shift 2 unsigned
281 addb,tr op1,pu,sh2a ; add op1
282 shd pu,pl,2,pl ; shift 2 bits
284 sh2c: shd pu,pl,2,pl
285 shd pc,pu,2,pu ; shift with carry
286 addb,tr op1,pu,sh2a ; add op1 to product
287 shd pu,pl,2,pl ; br. to sh2 to shift pu
289 sh2sa: extrs pu,29,30,pu ; shift with sign
290 addb,tr op1,pu,sh2a ; add op1 to product
291 shd pu,pl,2,pl ; br. to sh2 to shift pu
294 extru pu,29,30,pu
298 subb 0,pu,pu ; is negative
302 fini: stws pu,0(%arg2) ; save high part of result
313 ldws,mb -4(%sp),pu ; restore registers
Indexes created Sun Oct 19 22:09:57 GMT 2025