Lines Matching defs:ncr_sc
173 struct ncr5380_softc *ncr_sc = p;
174 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
178 if (*ncr_sc->sci_csr & SCI_CSR_INT) {
181 decode_5380_intr(ncr_sc);
184 claimed = ncr5380_intr(ncr_sc);
186 if (((*ncr_sc->sci_csr & ~SCI_CSR_PHASE_MATCH) == SCI_CSR_INT)
187 && ((*ncr_sc->sci_bus_csr & ~SCI_BUS_RST) == 0)) {
188 SCI_CLR_INTR(ncr_sc); /* RST interrupt */
190 (*sc->sc_clrintr)(ncr_sc);
195 device_xname(ncr_sc->sc_dev));
205 decode_5380_intr(struct ncr5380_softc *ncr_sc)
207 u_int8_t csr = *ncr_sc->sci_csr;
208 u_int8_t bus_csr = *ncr_sc->sci_bus_csr;
213 printf("%s: reselect\n", device_xname(ncr_sc->sc_dev));
215 printf("%s: select\n", device_xname(ncr_sc->sc_dev));
218 printf("%s: DMA eop\n", device_xname(ncr_sc->sc_dev));
221 printf("%s: bus reset\n", device_xname(ncr_sc->sc_dev));
224 printf("%s: parity error\n", device_xname(ncr_sc->sc_dev));
227 printf("%s: phase mismatch\n", device_xname(ncr_sc->sc_dev));
230 printf("%s: disconnect\n", device_xname(ncr_sc->sc_dev));
233 device_xname(ncr_sc->sc_dev), csr, bus_csr);
243 sbc_pdma_in(struct ncr5380_softc *ncr_sc, int phase, int datalen, u_char *data)
245 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
251 if (datalen < ncr_sc->sc_min_dma_len ||
253 (ncr_sc->sc_current != NULL &&
254 (ncr_sc->sc_current->sr_xs->xs_control & XS_CTL_POLL)))
255 return ncr5380_pio_in(ncr_sc, phase, datalen, data);
259 if (sbc_wait_busy(ncr_sc)) {
266 *ncr_sc->sci_mode |= SCI_MODE_DMA;
267 *ncr_sc->sci_irecv = 0;
283 if (sbc_ready(ncr_sc))
291 if (sbc_ready(ncr_sc))
300 SCI_CLR_INTR(ncr_sc);
301 *ncr_sc->sci_mode &= ~SCI_MODE_DMA;
302 *ncr_sc->sci_icmd = 0;
310 sbc_pdma_out(struct ncr5380_softc *ncr_sc, int phase, int datalen, u_char *data)
312 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
324 if (datalen < ncr_sc->sc_min_dma_len ||
327 (ncr_sc->sc_current != NULL &&
328 (ncr_sc->sc_current->sr_xs->xs_control & XS_CTL_POLL)))
329 return ncr5380_pio_out(ncr_sc, phase, datalen, data);
333 if (sbc_wait_busy(ncr_sc)) {
340 icmd = *(ncr_sc->sci_icmd) & SCI_ICMD_RMASK;
341 *ncr_sc->sci_icmd = icmd | SCI_ICMD_DATA;
342 *ncr_sc->sci_mode |= SCI_MODE_DMA;
343 *ncr_sc->sci_dma_send = 0;
361 if (sbc_ready(ncr_sc))
365 if (sbc_ready(ncr_sc))
369 if (sbc_ready(ncr_sc))
373 if (sbc_ready(ncr_sc))
377 if (sbc_ready(ncr_sc))
385 if (sbc_ready(ncr_sc))
392 if (sbc_wait_dreq(ncr_sc))
394 device_xname(ncr_sc->sc_dev));
400 if ((*ncr_sc->sci_csr & SCI_CSR_PHASE_MATCH) == 0) {
401 *ncr_sc->sci_icmd = icmd & ~SCI_ICMD_DATA;
406 SCI_CLR_INTR(ncr_sc);
407 *ncr_sc->sci_mode &= ~SCI_MODE_DMA;
408 *ncr_sc->sci_icmd = icmd;
439 struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)p;
440 struct sci_req *sr = ncr_sc->sc_current;
452 if (sbc_ready(ncr_sc) || dh->dh_len == 0)
458 device_xname(ncr_sc->sc_dev), dh->dh_len, dh->dh_flags);
479 device_xname(ncr_sc->sc_dev), count,
492 device_xname(ncr_sc->sc_dev), count, dh->dh_len);
560 if (*ncr_sc->sci_csr & SCI_CSR_ACK)
629 device_xname(ncr_sc->sc_dev), *ncr_sc->sci_csr,
630 *ncr_sc->sci_bus_csr);
635 sbc_dma_alloc(struct ncr5380_softc *ncr_sc)
637 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
638 struct sci_req *sr = ncr_sc->sc_current;
652 xlen = ncr_sc->sc_datalen;
671 dh->dh_addr = ncr_sc->sc_dataptr;
682 sbc_dma_free(struct ncr5380_softc *ncr_sc)
684 struct sci_req *sr = ncr_sc->sc_current;
692 if (ncr_sc->sc_state & NCR_DOINGDMA)
704 sbc_dma_poll(struct ncr5380_softc *ncr_sc)
706 struct sci_req *sr = ncr_sc->sc_current;
717 device_xname(ncr_sc->sc_dev));
723 sbc_dma_setup(struct ncr5380_softc *ncr_sc)
729 sbc_dma_start(struct ncr5380_softc *ncr_sc)
731 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
732 struct sci_req *sr = ncr_sc->sc_current;
740 *ncr_sc->sci_tcmd = PHASE_DATA_OUT;
741 SCI_CLR_INTR(ncr_sc);
743 (*sc->sc_clrintr)(ncr_sc);
744 *ncr_sc->sci_mode |= SCI_MODE_DMA;
745 *ncr_sc->sci_icmd = SCI_ICMD_DATA;
746 *ncr_sc->sci_dma_send = 0;
748 *ncr_sc->sci_tcmd = PHASE_DATA_IN;
749 SCI_CLR_INTR(ncr_sc);
751 (*sc->sc_clrintr)(ncr_sc);
752 *ncr_sc->sci_mode |= SCI_MODE_DMA;
753 *ncr_sc->sci_icmd = 0;
754 *ncr_sc->sci_irecv = 0;
756 ncr_sc->sc_state |= NCR_DOINGDMA;
761 device_xname(ncr_sc->sc_dev), dh->dh_addr, dh->dh_len);
766 sbc_dma_eop(struct ncr5380_softc *ncr_sc)
772 sbc_dma_stop(struct ncr5380_softc *ncr_sc)
774 struct sbc_softc *sc = (struct sbc_softc *)ncr_sc;
775 struct sci_req *sr = ncr_sc->sc_current;
779 if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
783 device_xname(ncr_sc->sc_dev));
787 ncr_sc->sc_state &= ~NCR_DOINGDMA;
789 if ((ncr_sc->sc_state & NCR_ABORTING) == 0) {
790 ntrans = ncr_sc->sc_datalen - dh->dh_len;
795 device_xname(ncr_sc->sc_dev), ntrans);
798 if (ntrans > ncr_sc->sc_datalen)
802 ncr_sc->sc_dataptr += ntrans;
803 ncr_sc->sc_datalen -= ntrans;
806 SCI_CLR_INTR(ncr_sc);
808 (*sc->sc_clrintr)(ncr_sc);
812 *ncr_sc->sci_mode &= ~SCI_MODE_DMA;
813 *ncr_sc->sci_icmd = 0;
818 device_xname(ncr_sc->sc_dev), *ncr_sc->sci_csr,
819 *ncr_sc->sci_bus_csr);
Indexes created Mon Sep 29 21:09:56 GMT 2025