Cross Reference: /src/sys/arch/mips/cavium/octeon

Lines Matching defs:cpu
43 #include <sys/cpu.h>
139 			.cnaa_name = "cpu",
219 	// First thing is setup the exception vectors for this cpu.
222 	// Next rewrite those exceptions to use this cpu's cpu_info.
252 	struct cpu_softc * const cpu __diagused = ci->ci_softc;
257 	KASSERTMSG(cpu != NULL, "ci %p index %d", ci, cpu_index(ci));
272 	cpu->cpu_wdog_sih = softint_establish(SOFTINT_CLOCK|SOFTINT_MPSAFE,
273 	    wdog_cpunode_poke, cpu);
274 	KASSERT(cpu->cpu_wdog_sih != NULL);
372 				struct cpu_softc * const cpu = ci->ci_softc;
373 				uint64_t wdog = mips3_ld(cpu->cpu_wdog);
375 				mips3_sd(cpu->cpu_pp_poke, wdog);
379 				mips3_sd(cpu->cpu_wdog, wdog);
380 				mips3_sd(cpu->cpu_pp_poke, wdog);
403 			struct cpu_softc * const cpu = ci->ci_softc;
404 			uint64_t wdog = mips3_ld(cpu->cpu_wdog);
411 			mips3_sd(cpu->cpu_wdog, wdog);
422 	struct cpu_softc *cpu = arg;
424 	mips3_sd(cpu->cpu_pp_poke, 0);
469 	 * We need one softint per cpu.  It's to tickle the softints on
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