Cross Reference: /src/sys/arch/mips/ralink/ralink

Lines Matching defs:ptp
265 #define RA_GPIO_PIN_INIT(sc, var, pin, ptp, regname)			\
267 		const u_int _reg_bit = 1 << (pin - ptp->pin_reg_base);	\
268 		const u_int _mask_bit = 1 << (pin - ptp->pin_mask_base);\
269 		var = gp_read(sc, ptp->regname.reg);			\
270 		if ((ptp->regname.mask & _mask_bit) != 0) {		\
275 		gp_write(sc, ptp->regname.reg, var);			\
278 #define RA_GPIO_PIN_INIT_DIR(sc, var, pin, ptp)				\
280 		const u_int _reg_bit = 1 << (pin - ptp->pin_reg_base);	\
281 		const u_int _mask_bit = 1 << (pin - ptp->pin_mask_base);\
282 		var = gp_read(sc, ptp->pin_dir.reg);			\
283 		if ((ptp->pin_dir.mask & _mask_bit) != 0) {		\
290 		gp_write(sc, ptp->pin_dir.reg, var);			\
807 	const pin_tab_t * const ptp = &pin_tab[index];
808 	const u_int mask_bit = 1 << (pin - ptp->pin_mask_base);
809 	if ((ptp->pin_enabled & mask_bit) == 0)
870 	RA_GPIO_PIN_INIT_DIR(sc, r, pin, ptp);
873 	RA_GPIO_PIN_INIT(sc, r, pin, ptp, pin_rise);
876 	RA_GPIO_PIN_INIT(sc, r, pin, ptp, pin_fall);
879 	RA_GPIO_PIN_INIT(sc, r, pin, ptp, pin_pol);
908 			const pin_tab_t * const ptp = &pin_tab[index];
909 			const uint32_t reg_bit = 1 << (pin - ptp->pin_reg_base);
910 			const bus_size_t off = ptp->pin_input;
1008 	const pin_tab_t * const ptp = &pin_tab[index];
1009 	const u_int mask_bit = 1 << (pin - ptp->pin_mask_base);
1010 	const uint32_t reg_bit = 1 << (pin - ptp->pin_reg_base);
1012 		ptp->pin_output_clr : ptp->pin_output_set;
1014 	if ((ptp->pin_dir.mask & mask_bit) == 0) {
1439 	const pin_tab_t * const ptp = &pin_tab[index];
1440 	const uint32_t reg_bit = 1 << (pin - ptp->pin_reg_base);
1443 	r = gp_read(sc, ptp->pin_rise.reg);
1445 	gp_write(sc, ptp->pin_rise.reg, r);
1447 	r = gp_read(sc, ptp->pin_fall.reg);
1449 	gp_write(sc, ptp->pin_fall.reg, r);
1463 	const pin_tab_t * const ptp = &pin_tab[index];
1464 	const uint32_t mask_bit = 1 << (pin - ptp->pin_mask_base);
1465 	const uint32_t reg_bit = 1 << (pin - ptp->pin_reg_base);
1468 	if (ptp->pin_rise.mask & mask_bit) {
1469 		r = gp_read(sc, ptp->pin_rise.reg);
1471 		gp_write(sc, ptp->pin_rise.reg, r);
1474 	if (ptp->pin_fall.mask & mask_bit) {
1475 		r = gp_read(sc, ptp->pin_fall.reg);
1477 		gp_write(sc, ptp->pin_fall.reg, r);
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