Lines Matching refs:_SB_MAKEMASK
65 #define M_BCM1480_HSP_RX_PLL_MULTIPLIER _SB_MAKEMASK(5,S_BCM1480_HSP_RX_PLL_MULTIPLIER)
70 #define M_BCM1480_HSP_TRAIN_CYCLE_COUNT _SB_MAKEMASK(8,S_BCM1480_HSP_TRAIN_CYCLE_COUNT)
75 #define M_BCM1480_HSP_DIP4_ERR_CLEAR _SB_MAKEMASK(4,S_BCM1480_HSP_DIP4_ERR_CLEAR)
80 #define M_BCM1480_DIP4_ERR_LIMIT _SB_MAKEMASK(4,S_BCM1480_DIP4_ERR_LIMIT)
87 #define M_BCM1480_HSP_LINK_MODE _SB_MAKEMASK(2,S_BCM1480_HSP_LINK_MODE)
104 #define M_BCM1480_HSP_RX_DESKEW_BIT(b) _SB_MAKEMASK(2,S_BCM1480_HSP_RX_DESKEW_BIT(b))
114 #define M_BCM1480_HSP_RX_DESKEW_PER_BIT _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DESKEW_PER_BIT)
130 #define M_BCM1480_HSP_TX_PLL_MULTIPLIER _SB_MAKEMASK(5,S_BCM1480_HSP_TX_PLL_MULTIPLIER)
135 #define M_BCM1480_HSP_TX_RST_TRAINCNT _SB_MAKEMASK(16,S_BCM1480_HSP_TX_RST_TRAINCNT)
140 #define M_BCM1480_HSP_TX_RST_STATCNT _SB_MAKEMASK(4,S_BCM1480_HSP_TX_RST_STATCNT)
149 #define M_BCM1480_HSP_TX_DIP2_ERRLIMIT _SB_MAKEMASK(4,S_BCM1480_HSP_TX_DIP2_ERRLIMIT)
162 #define M_BCM1480_HSP_TX_DATA_MAX_T _SB_MAKEMASK(16,S_BCM1480_HSP_TX_DATA_MAX_T)
167 #define M_BCM1480_HSP_TX_TXPREFBURSTSZ _SB_MAKEMASK(8,S_BCM1480_HSP_TX_TXPREFBURSTSZ)
172 #define M_BCM1480_HSP_TX_TXMAXBURSTSZ _SB_MAKEMASK(8,S_BCM1480_HSP_TX_TXMAXBURSTSZ)
204 #define M_BCM1480_HSP_RX_BAD_CRC_LANE _SB_MAKEMASK(32,S_BCM1480_HSP_RX_BAD_CRC_LANE)
209 #define M_BCM1480_HSP_RX_EXPECTED_CRC_LANE _SB_MAKEMASK(32,S_BCM1480_HSP_RX_EXPECTED_CRC_LANE)
224 #define M_BCM1480_HSP_RX_DIAG_VC _SB_MAKEMASK(8,S_BCM1480_HSP_RX_DIAG_VC)
232 #define M_BCM1480_HSP_RX_DIAG_CONTROL _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DIAG_CONTROL)
239 #define M_BCM1480_HSP_RX_DIAG_ERR_CODE_1 _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DIAG_ERR_CODE_1)
244 #define M_BCM1480_HSP_RX_DIAG_ERR_CODE_2 _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DIAG_ERR_CODE_2)
282 #define M_BCM1480_HSP_RX_DIAGDET_STATUS _SB_MAKEMASK(20,S_BCM1480_HSP_RX_DIAGDET_STATUS)
287 #define M_BCM1480_HSP_RX_DIAGDET_PUSHPOP_DISTANCE _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DIAGDET_PUSHPOP_DISTANCE)
292 #define M_BCM1480_HSP_RX_DIAGDET_ESTORE_DISTANCE _SB_MAKEMASK(4,S_BCM1480_HSP_RX_DIAGDET_ESTORE_DISTANCE)
315 #define M_BCM1480_HSP_RX_RAMCEILING_0 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_RAMCEILING_0)
320 #define M_BCM1480_HSP_RX_RAMFLOOR_0 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_RAMFLOOR_0)
325 #define M_BCM1480_HSP_RX_RAMCEILING_1 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_RAMCEILING_1)
330 #define M_BCM1480_HSP_RX_RAMFLOOR_1 _SB_MAKEMASK
339 #define M_BCM1480_HSP_RX_NPC_CMD_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_NPC_CMD_CEILING)
344 #define M_BCM1480_HSP_RX_NPC_CMD_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_NPC_CMD_FLOOR)
353 #define M_BCM1480_HSP_RX_PC_CMD_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PC_CMD_CEILING)
358 #define M_BCM1480_HSP_RX_PC_CMD_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PC_CMD_FLOOR)
363 #define M_BCM1480_HSP_RX_PRB_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PRB_CEILING)
368 #define M_BCM1480_HSP_RX_PRB_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PRB_FLOOR)
377 #define M_BCM1480_HSP_RX_ACK_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_ACK_CEILING)
382 #define M_BCM1480_HSP_RX_ACK_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_ACK_FLOOR)
387 #define M_BCM1480_HSP_RX_WB_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_WB_CEILING)
392 #define M_BCM1480_HSP_RX_WB_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_WB_FLOOR)
401 #define M_BCM1480_HSP_RX_CFILL_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_CFILL_CEILING)
406 #define M_BCM1480_HSP_RX_CFILL_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_CFILL_FLOOR)
411 #define M_BCM1480_HSP_RX_CRD_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_CRD_CEILING)
416 #define M_BCM1480_HSP_RX_CRD_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_CRD_FLOOR)
425 #define M_BCM1480_HSP_RX_NPC_DAT_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_NPC_DAT_CEILING)
430 #define M_BCM1480_HSP_RX_NPC_DAT_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_NPC_DAT_FLOOR)
435 #define M_BCM1480_HSP_RX_RSP_DAT_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_RSP_DAT_CEILING)
440 #define M_BCM1480_HSP_RX_RSP_DAT_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_RSP_DAT_FLOOR)
449 #define M_BCM1480_HSP_RX_PC_DAT_CEILING _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PC_DAT_CEILING)
454 #define M_BCM1480_HSP_RX_PC_DAT_FLOOR _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PC_DAT_FLOOR)
465 #define M_BCM1480_HSP_TX_RAMCEILING_0 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RAMCEILING_0)
470 #define M_BCM1480_HSP_TX_RAMFLOOR_0 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RAMFLOOR_0)
475 #define M_BCM1480_HSP_TX_RAMCEILING_1 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RAMCEILING_1)
480 #define M_BCM1480_HSP_TX_RAMFLOOR_1 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RAMFLOOR_1)
489 #define M_BCM1480_HSP_TX_NPC_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_NPC_CEILING)
494 #define M_BCM1480_HSP_TX_NPC_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_NPC_FLOOR)
503 #define M_BCM1480_HSP_TX_RSP_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RSP_CEILING)
508 #define M_BCM1480_HSP_TX_RSP_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RSP_FLOOR)
517 #define M_BCM1480_HSP_TX_PC_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PC_CEILING)
522 #define M_BCM1480_HSP_TX_PC_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PC_FLOOR)
531 #define M_BCM1480_HSP_TX_PRB_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PRB_CEILING)
536 #define M_BCM1480_HSP_TX_PRB_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PRB_FLOOR)
541 #define M_BCM1480_HSP_TX_ACK_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_ACK_CEILING)
546 #define M_BCM1480_HSP_TX_ACK_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_ACK_FLOOR)
555 #define M_BCM1480_HSP_TX_WB_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_WB_CEILING)
560 #define M_BCM1480_HSP_TX_WB_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_WB_FLOOR)
565 #define M_BCM1480_HSP_TX_CFILL_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_CFILL_CEILING)
570 #define M_BCM1480_HSP_TX_CFILL_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_CFILL_FLOOR)
579 #define M_BCM1480_HSP_TX_CRD_CEILING _SB_MAKEMASK(8,S_BCM1480_HSP_TX_CRD_CEILING)
584 #define M_BCM1480_HSP_TX_CRD_FLOOR _SB_MAKEMASK(8,S_BCM1480_HSP_TX_CRD_FLOOR)
593 #define M_BCM1480_HSP_RX_CALENDAR_LEN _SB_MAKEMASK(8,S_BCM1480_HSP_RX_CALENDAR_LEN)
598 #define M_BCM1480_HSP_RX_CALENDAR_M _SB_MAKEMASK(8,S_BCM1480_HSP_RX_CALENDAR_M)
603 #define M_BCM1480_HSP_RX_ALPHA _SB_MAKEMASK(12,S_BCM1480_HSP_RX_ALPHA)
613 #define M_BCM1480_HSP_RX_CALENDAR_X(c) _SB_MAKEMASK(12,S_BCM1480_HSP_RX_CALENDAR_X(c))
622 #define M_BCM1480_HSP_RX_ALMOSTEMPTY_EVEN _SB_MAKEMASK(10,S_BCM1480_HSP_RX_ALMOSTEMPTY_EVEN)
627 #define M_BCM1480_HSP_RX_ALMOSTFULL_EVEN _SB_MAKEMASK(10,S_BCM1480_HSP_RX_ALMOSTFULL_EVEN)
632 #define M_BCM1480_HSP_RX_ALMOSTEMPTY_ODD _SB_MAKEMASK(10,S_BCM1480_HSP_RX_ALMOSTEMPTY_ODD)
637 #define M_BCM1480_HSP_RX_ALMOSTFULL_ODD _SB_MAKEMASK(10,S_BCM1480_HSP_RX_ALMOSTFULL_ODD)
647 #define M_BCM1480_HSP_TX_CALENDAR_LEN _SB_MAKEMASK(8,S_BCM1480_HSP_TX_CALENDAR_LEN)
652 #define M_BCM1480_HSP_TX_CALENDAR_M _SB_MAKEMASK(8,S_BCM1480_HSP_TX_CALENDAR_M)
657 #define M_BCM1480_HSP_TX_MAXBURST1 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_MAXBURST1)
662 #define M_BCM1480_HSP_TX_MAXBURST2 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_MAXBURST2)
668 #define M_BCM1480_HSP_TX_ALPHA _SB_MAKEMASK(12,S_BCM1480_HSP_TX_ALPHA)
673 #define M_BCM1480_HSP_TX_ACTIVE_CHANNELS _SB_MAKEMASK(8,S_BCM1480_HSP_TX_ACTIVE_CHANNELS)
684 #define M_BCM1480_HSP_TX_CALENDAR_X(c) _SB_MAKEMASK(12,S_BCM1480_HSP_TX_CALENDAR_X(c))
693 #define M_BCM1480_HSP_RX_PHITCNT_0 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PHITCNT_0)
698 #define M_BCM1480_HSP_RX_PHITCNT_1 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PHITCNT_1)
703 #define M_BCM1480_HSP_RX_PHITCNT_2 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PHITCNT_2)
708 #define M_BCM1480_HSP_RX_PHITCNT_3 _SB_MAKEMASK(10,S_BCM1480_HSP_RX_PHITCNT_3)
717 #define M_BCM1480_HSP_RX_NPC_CMD_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_RX_NPC_CMD_PHITCNT)
722 #define M_BCM1480_HSP_RX_NPC_DAT_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_RX_NPC_DAT_PHITCNT)
727 #define M_BCM1480_HSP_RX_RSP_DAT_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_RX_RSP_DAT_PHITCNT)
732 #define M_BCM1480_HSP_RX_PC_CMD_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_RX_PC_CMD_PHITCNT)
737 #define M_BCM1480_HSP_RX_PC_DAT_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_RX_PC_DAT_PHITCNT)
746 #define M_BCM1480_HSP_TX_HTCC_PRB_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_HTCC_PRB_PHITCNT)
751 #define M_BCM1480_HSP_TX_HTCC_ACK_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_HTCC_ACK_PHITCNT)
756 #define M_BCM1480_HSP_TX_HTCC_WB_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_HTCC_WB_PHITCNT)
761 #define M_BCM1480_HSP_TX_HTCC_CFILL_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_HTCC_CFILL_PHITCNT)
766 #define M_BCM1480_HSP_TX_HTCC_CRD_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_HTCC_CRD_PHITCNT)
775 #define M_BCM1480_HSP_TX_PHITCNT_0 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PHITCNT_0)
780 #define M_BCM1480_HSP_TX_PHITCNT_1 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PHITCNT_1)
785 #define M_BCM1480_HSP_TX_PHITCNT_2 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PHITCNT_2)
790 #define M_BCM1480_HSP_TX_PHITCNT_3 _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PHITCNT_3)
799 #define M_BCM1480_HSP_TX_NPC_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_NPC_PHITCNT)
804 #define M_BCM1480_HSP_TX_RSP_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_RSP_PHITCNT)
809 #define M_BCM1480_HSP_TX_PC_PHITCNT _SB_MAKEMASK(8,S_BCM1480_HSP_TX_PC_PHITCNT)
814 #define M_BCM1480_HSP_TX_NEXT_ADDR_EVEN _SB_MAKEMASK(32,S_BCM1480_HSP_TX_NEXT_ADDR_EVEN)
819 #define M_BCM1480_HSP_TX_NEXT_ADDR_ODD _SB_MAKEMASK(32,S_BCM1480_HSP_TX_NEXT_ADDR_ODD)
840 #define M_BCM1480_HSP_RXPLL_FREQF_SEL _SB_MAKEMASK(4,S_BCM1480_HSP_RXPLL_FREQF_SEL)
845 #define M_BCM1480_HSP_RXPLL_FDBK_SEL _SB_MAKEMASK(4,S_BCM1480_HSP_RXPLL_FDBK_SEL)
850 #define M_BCM1480_HSP_RXPLL_VCO_RANGE _SB_MAKEMASK(2,S_BCM1480_HSP_RXPLL_VCO_RANGE)
859 #define M_BCM1480_HSP_RXPLL_RX_PLLTEST _SB_MAKEMASK(2,S_BCM1480_HSP_RXPLL_RX_PLLTEST)
864 #define M_BCM1480_HSP_RXPLL_RX_PLLCTRL _SB_MAKEMASK(6,S_BCM1480_HSP_RXPLL_RX_PLLCTRL)
875 #define M_BCM1480_HSP_TXPLL_FREQF_SEL _SB_MAKEMASK(4,S_BCM1480_HSP_TXPLL_FREQF_SEL)
880 #define M_BCM1480_HSP_TXPLL_FDBK_SEL _SB_MAKEMASK(4,S_BCM1480_HSP_TXPLL_FDBK_SEL)
885 _SB_MAKEMASK(2,S_BCM1480_HSP_TXPLL_VCO_RANGE)
895 #define M_BCM1480_HSP_TXPLL_TX_PLLTEST _SB_MAKEMASK(2,S_BCM1480_HSP_TXPLL_TX_PLLTEST)
900 #define M_BCM1480_HSP_TXPLL_TX_PLLCTRL _SB_MAKEMASK(6,S_BCM1480_HSP_TXPLL_TX_PLLCTRL)
916 #define M_BCM1480_HSP_CAL_BMODE _SB_MAKEMASK(2,S_BCM1480_HSP_CAL_BMODE)
921 #define M_BCM1480_HSP_CAL_CALSETP _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALSETP)
926 #define M_BCM1480_HSP_CAL_CALSETN _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALSETN)
931 #define M_BCM1480_HSP_CAL_CALPSTAT _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALPSTAT)
936 #define M_BCM1480_HSP_CAL_CALNSTAT _SB_MAKEMASK(4,S_BCM1480_HSP_CAL_CALNSTAT)
948 #define M_BCM1480_HSP_RXTST_EWRAP _SB_MAKEMASK(2,S_BCM1480_HSP_RXTST_EWRAP)
958 #define M_BCM1480_HSP_RXTST_RX_ICNTRL _SB_MAKEMASK(12,S_BCM1480_HSP_RXTST_RX_ICNTRL)
963 #define M_BCM1480_HSP_RXTST_RX_RCNTRL _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_RCNTRL)
968 #define M_BCM1480_HSP_RXTST_RX_GCNTRL _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_GCNTRL)
973 #define M_BCM1480_HSP_RXTST_RX_OORCNTRL _SB_MAKEMASK(2,S_BCM1480_HSP_RXTST_RX_OORCNTRL)
978 #define M_BCM1480_HSP_RXTST_RX_CNTRL _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_CNTRL)
983 #define M_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA _SB_MAKEMASK(3,S_BCM1480_HSP_RXTST_RX_LPBK_PHASE_SEL_RXA)
994 #define M_BCM1480_HSP_RXTST_RX_BIAS _SB_MAKEMASK(2,S_BCM1480_HSP_RXTST_RX_BIAS)
1004 #define M_BCM1480_HSP_TXTST_CTL _SB_MAKEMASK(3,S_BCM1480_HSP_TXTST_CTL)
1009 #define M_BCM1480_HSP_TXTST_BIAS _SB_MAKEMASK(4,S_BCM1480_HSP_TXTST_BIAS)
1014 #define M_BCM1480_HSP_TXTST_VCOM_CTL _SB_MAKEMASK(4,S_BCM1480_HSP_TXTST_VCOM_CTL)
1019 #define M_BCM1480_HSP_TXTST_MUX_CTL _SB_MAKEMASK(4,S_BCM1480_HSP_TXTST_MUX_CTL)
1024 #define M_BCM1480_HSP_TXTST_SLEWP_CTL _SB_MAKEMASK(2,S_BCM1480_HSP_TXTST_SLEWP_CTL)
1029 #define M_BCM1480_HSP_TXTST_SLEWN_CTL _SB_MAKEMASK(2,S_BCM1480_HSP_TXTST_SLEWN_CTL)
1034 #define M_BCM1480_HSP_TXTST_CURR_CTL _SB_MAKEMASK(2,S_BCM1480_HSP_TXTST_CURR_CTL)
1049 #define M_BCM1480_HSP_RXVIS_RAM _SB_MAKEMASK(3,S_BCM1480_HSP_RXVIS_RAM)
1060 #define M_BCM1480_HSP_RXVIS_RAM_ADDR _SB_MAKEMASK(16,S_BCM1480_HSP_RXVIS_RAM_ADDR)
1071 #define M_BCM1480_HSP_RXRFVIS_RAM _SB_MAKEMASK(4,S_BCM1480_HSP_RXRFVIS_RAM)
1086 #define M_BCM1480_HSP_RXRFVIS_RAM_ADDR _SB_MAKEMASK(8,S_BCM1480_HSP_RXRFVIS_RAM_ADDR)
1102 #define M_BCM1480_HSP_TXVIS_RAM _SB_MAKEMASK(3,S_BCM1480_HSP_TXVIS_RAM)
1111 #define M_BCM1480_HSP_TXVIS_RAM_ADDR _SB_MAKEMASK(16,S_BCM1480_HSP_TXVIS_RAM_ADDR)
1122 #define M_BCM1480_HSP_TXRFVIS_RAM _SB_MAKEMASK(4,S_BCM1480_HSP_TXRFVIS_RAM)
1139 #define M_BCM1480_HSP_TXRFVIS_RAM_ADDR _SB_MAKEMASK(8,S_BCM1480_HSP_TXRFVIS_RAM_ADDR)
Indexes created Wed Oct 22 13:09:56 GMT 2025