Lines Matching refs:_SB_MAKEMASK
58 #define M_BCM1480_RLD_WAY_ENABLE _SB_MAKEMASK(8,S_BCM1480_RLD_WAY_ENABLE)
67 #define M_BCM1480_RLD_RANDOM_SEED _SB_MAKEMASK(8,S_BCM1480_RLD_RANDOM_SEED)
76 #define M_BCM1480_RLD_FIELD_OFFSET _SB_MAKEMASK(5,S_BCM1480_RLD_FIELD_OFFSET)
81 #define M_BCM1480_RLD_FIELD_INDEX _SB_MAKEMASK(11,S_BCM1480_RLD_FIELD_INDEX)
86 #define M_BCM1480_RLD_FIELD_TAG _SB_MAKEMASK(20,S_BCM1480_RLD_FIELD_TAG)
91 #define M_BCM1480_RLD_FIELD_WAY_SELECT _SB_MAKEMASK(3,S_BCM1480_RLD_FIELD_WAY_SELECT)
99 #define M_BCM1480_RLD_FIELD_NODE_VECTOR _SB_MAKEMASK(11,S_BCM1480_RLD_FIELD_NODE_VECTOR)
104 #define M_BCM1480_RLD_FIELD_ECC_BITS _SB_MAKEMASK(7,S_BCM1480_RLD_FIELD_ECC_BITS)
116 #define M_BCM1480_RLD_TRIGGER_TAG _SB_MAKEMASK(20,S_BCM1480_RLD_TRIGGER_TAG)
124 #define M_BCM1480_RLD_TRIGGER_NODE_VECTOR _SB_MAKEMASK(11,S_BCM1480_RLD_TRIGGER_NODE_VECTOR)
129 #define M_BCM1480_RLD_TRIGGER_ECC_BITS _SB_MAKEMASK(7,S_BCM1480_RLD_TRIGGER_ECC_BITS)
141 #define M_BCM1480_RLD_BAD_ECC _SB_MAKEMASK(8,S_BCM1480_RLD_BAD_ECC)
150 #define M_BCM1480_RLD_COR_ERR _SB_MAKEMASK(8,S_BCM1480_RLD_COR_ERR)
159 #define M_BCM1480_RLD_ECC_CS_OFFSET _SB_MAKEMASK(5,S_BCM1480_RLD_ECC_CS_OFFSET)
164 #define M_BCM1480_RLD_ECC_CS_INDEX _SB_MAKEMASK(11,S_BCM1480_RLD_ECC_CS_INDEX)
169 #define M_BCM1480_RLD_ECC_CS_TAG _SB_MAKEMASK(20,S_BCM1480_RLD_ECC_CS_TAG)
174 #define M_BCM1480_RLD_ECC_CS_WAY_SELECT _SB_MAKEMASK(3,S_BCM1480_RLD_ECC_CS_WAY_SELECT)
182 #define M_BCM1480_RLD_ECC_CS_NODE_VECTOR _SB_MAKEMASK(11,S_BCM1480_RLD_ECC_CS_NODE_VECTOR)
187 #define M_BCM1480_RLD_ECC_CS_ECC_BITS _SB_MAKEMASK(7,S_BCM1480_RLD_ECC_CS_ECC_BITS)
Indexes created Mon Oct 20 20:10:13 GMT 2025