Cross Reference: /src/sys/arch/newsmips/dev/zs.c

Lines Matching refs:cs
106 zs_get_speed(struct zs_chanstate *cs)
110 	tconst = zs_read_reg(cs, 12);
111 	tconst |= zs_read_reg(cs, 13) << 8;
112 	return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
119 zs_set_speed(struct zs_chanstate *cs, int bps)
127 	if (cs->cs_brg_clk == 0)
131 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
136 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
142 	cs->cs_preg[12] = tconst;
143 	cs->cs_preg[13] = tconst >> 8;
150 zs_set_modes(struct zs_chanstate *cs, int cflag)
162 	cs->cs_rr0_pps = 0;
164 		cs->cs_rr0_dcd = 0;
166 			cs->cs_rr0_pps = ZSRR0_DCD;
168 		cs->cs_rr0_dcd = ZSRR0_DCD;
170 		cs->cs_wr5_dtr = ZSWR5_DTR;
171 		cs->cs_wr5_rts = ZSWR5_RTS;
172 		cs->cs_rr0_cts = ZSRR0_CTS;
174 		cs->cs_wr5_dtr = 0;
175 		cs->cs_wr5_rts = ZSWR5_DTR;
176 		cs->cs_rr0_cts = ZSRR0_DCD;
178 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
179 		cs->cs_wr5_rts = 0;
180 		cs->cs_rr0_cts = 0;
193 zs_read_reg(struct zs_chanstate *cs, uint8_t reg)
197 	*cs->cs_reg_csr = reg;
199 	val = *cs->cs_reg_csr;
205 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)
208 	*cs->cs_reg_csr = reg;
210 	*cs->cs_reg_csr = val;
215 zs_read_csr(struct zs_chanstate *cs)
219 	val = *cs->cs_reg_csr;
225 zs_write_csr(struct zs_chanstate *cs, uint8_t val)
228 	*cs->cs_reg_csr = val;
233  zs_read_data(struct zs_chanstate *cs)
237 	val = *cs->cs_reg_data;
243 zs_write_data(struct zs_chanstate *cs, uint8_t val)
246 	*cs->cs_reg_data = val;
251 zs_abort(struct zs_chanstate *cs)
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