Cross Reference: /src/sys/arch/powerpc/fpu/fpu

Lines Matching refs:FPE_INSN
403 				DPRINTF(FPE_INSN, ("reg %d has %lx reg %d has %lx\n",
411 				DPRINTF(FPE_INSN,
435 			DPRINTF(FPE_INSN, ("reg %d has %lx reg %d has %lx\n",
452 			DPRINTF(FPE_INSN, ("reg %d has %lx displ %lx\n",
476 				DPRINTF(FPE_INSN,
482 				DPRINTF(FPE_INSN,
494 			DPRINTF(FPE_INSN, ("fpu_execute: Load from %p\n",
525 				DPRINTF(FPE_INSN, ("fpu_execute: FCMPU\n"));
547 				DPRINTF(FPE_INSN
558 				DPRINTF(FPE_INSN, ("fpu_execute: FCTIW\n"));
566 				DPRINTF(FPE_INSN, ("fpu_execute: FCMPO\n"));
579 				DPRINTF(FPE_INSN, ("fpu_execute: MTFSB1\n"));
585 				DPRINTF(FPE_INSN, ("fpu_execute: FNEGABS\n"));
593 				DPRINTF(FPE_INSN, ("fpu_execute: MCRFS\n"));
608 				DPRINTF(FPE_INSN, ("fpu_execute: MTFSB0\n"));
614 				DPRINTF(FPE_INSN, ("fpu_execute: FMR\n"));
620 				DPRINTF(FPE_INSN, ("fpu_execute: MTFSFI\n"));
629 				DPRINTF(FPE_INSN, ("fpu_execute: FABS\n"));
637 				DPRINTF(FPE_INSN, ("fpu_execute: FABS\n"));
645 				DPRINTF(FPE_INSN, ("fpu_execute: MFFS\n"));
651 				DPRINTF(FPE_INSN, ("fpu_execute: MTFSF\n"));
669 				DPRINTF(FPE_INSN, ("fpu_execute: FCTID\n"));
677 				DPRINTF(FPE_INSN, ("fpu_execute: FCFID\n"));
701 				DPRINTF(FPE_INSN, ("fpu_execute: FDIV\n"));
708 				DPRINTF(FPE_INSN, ("fpu_execute: FSUB\n"));
715 				DPRINTF(FPE_INSN, ("fpu_execute: FADD\n"));
722 				DPRINTF(FPE_INSN, ("fpu_execute: FSQRT\n"));
728 				DPRINTF(FPE_INSN, ("fpu_execute: FSEL\n"));
737 				DPRINTF(FPE_INSN, ("f%d => f%d\n", rc, rt));
743 				DPRINTF(FPE_INSN, ("fpu_execute: FPRES\n"));
750 				DPRINTF(FPE_INSN, ("fpu_execute: FMUL\n"));
758 				DPRINTF(FPE_INSN, ("fpu_execute: FRSQRTE\n"));
767 				DPRINTF(FPE_INSN, ("fpu_execute: FMSUB\n"));
777 				DPRINTF(FPE_INSN, ("fpu_execute: FMADD\n"));
787 				DPRINTF(FPE_INSN, ("fpu_execute: FNMSUB\n"));
800 				DPRINTF(FPE_INSN, ("fpu_execute: FNMADD\n"));
841 		DPRINTF(FPE_INSN, ("fpu_execute: cx %x, fsr %x\n", cx, fsr));
858 		DPRINTF(FPE_INSN, ("fpu_execute: cr[1] <= %x\n", bits));
868 		DPRINTF(FPE_INSN, ("fpu_execute: cr[%d] (cr=%x) <= %x\n", bf/4, tf->tf_cr, bits));
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