| History log of /src/sys/arch/powerpc/fpu/fpu_emu.c |
| Revision | | Date | Author | Comments |
| 1.60 |
| 20-Sep-2022 |
rin | Typo in comment. No binary changes.
|
| 1.59 |
| 20-Sep-2022 |
rin | stfs{,x}{,u}: Switch to conversion algorithm specified by Power ISA.
The ISA specifies algorithm for most bit patterns in double format, that
are not representable in float. I believe that sane people do not rely on
such a specification detail, but *REAL* programmers may utilize it ;)
Instead of complicating fpu_explode(), single-purpose helper function,
fpu_to_single(), is introduced. See comment therein for more details.
|
| 1.58 |
| 15-Sep-2022 |
rin | fnm{add,sub}{,s}: Do not negate NaN.
|
| 1.57 |
| 15-Sep-2022 |
rin | fpu_execute(): Use FR() macro. No binary changes.
|
| 1.56 |
| 09-Sep-2022 |
rin | G/C ``notyet''; OPC_load_st_62 == std{,u} are integer insns.
No binary changes.
|
| 1.55 |
| 07-Sep-2022 |
rin | Fix mnemonics for fm{add,sub}. NFC except for evcnt(9) names.
|
| 1.54 |
| 05-Sep-2022 |
rin | static-fy fpu_execute().
|
| 1.53 |
| 04-Sep-2022 |
rin | Trailing white-space/TAB.
|
| 1.52 |
| 04-Sep-2022 |
rin | Simplify; no need to override ``type'' here. NFC.
|
| 1.51 |
| 04-Sep-2022 |
rin | Update FR and FI (and undefined FPRF) for ``round to integer'' insns.
|
| 1.50 |
| 04-Sep-2022 |
rin | Fix logic for FI, FR, and FPRF fields of FPSCR.
They are not sticky bits and updated by arithmetic and round
insns at the same time.
Comparison insns update only FPCC sub-field of FPRF.
For other insns, these field are left untouched.
Also, for single-precision insns, exception bits should be set by
the first fpu_implode(), which rounds the value to float.
|
| 1.49 |
| 03-Sep-2022 |
rin | Localize addr and buf. NFC.
|
| 1.48 |
| 03-Sep-2022 |
rin | Fix weird logic. NFC.
Set both type and size to double by default, and change both to
single if required.
|
| 1.47 |
| 03-Sep-2022 |
rin | Do not use ``cond'' for two purposes: flag and bit field.
For the latter, use ``bits'' instead. Switch ``cond'' to int.
NFC.
|
| 1.46 |
| 02-Sep-2022 |
rin | Fix fres and frsqrte.
- Pass correct fp to succeeding fpu_implode().
- fres calculates 1 / frB; not 1 / sqrt(frB).
|
| 1.45 |
| 02-Sep-2022 |
rin | Make fpu_explode() and fpu_implode() take uint64_t and uint64_t *,
instead of register number, respectively. NFC.
|
| 1.44 |
| 01-Sep-2022 |
rin | Set FPSCR[FPRF] for calculated result, for all instructions
that are documented to update this field.
Exceptions are fcti{w,d}{,z}; FPSCR[FPRF] becomes undefined,
according to Power ISA. We do not overwrite this field for
these insns at the moment.
|
| 1.43 |
| 30-Aug-2022 |
rin | Fix fcti{w,d}{,z}.
- Treat 64-bit integer correctly for fctid{,z}.
- Respect round mode specified by FPSCR[RN].
XXX
- Set FPSCR[FR] and [FI] appropriately.
- Also set FPSCR[FPRF]?
- fctid{,z} traps on powerpc32 (confirmed on 603e and G4).
|
| 1.42 |
| 30-Aug-2022 |
rin | Fix fsel; frB is chosen when frA is negative or NaN.
For fpu_emu.c rev 1.41 or prior, wrong register was chosen for
NaN with sign bit being cleared.
|
| 1.41 |
| 30-Aug-2022 |
rin | Fix mcrfs; Clear copied exception bits, and do not raise any exception.
|
| 1.40 |
| 30-Aug-2022 |
rin | Misc clean up for mtfsf{,i}. NFC.
|
| 1.39 |
| 30-Aug-2022 |
rin | Fix mtfsb[01]; these can clear/set any FPSCR bits other than FEX and VX.
|
| 1.38 |
| 30-Aug-2022 |
rin | Fix logic for FPSCR[FEX].
It is logical OR (similar to FPSCR[VX]) of raised exception bits for
enabled exceptions.
|
| 1.37 |
| 30-Aug-2022 |
rin | Revert rev 1.29:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/powerpc/fpu/fpu_emu.c#rev1.29
> FPSCR[FEX] is not a sticky bit; it is always cleared when read from
> userland via mffs on real hardware.
This turned out to be wrong. FEX is actually observed for 603e.
|
| 1.36 |
| 27-Jul-2022 |
rin | Correct stale comment. Thanks rillig@ for pointed out. NFC.
|
| 1.35 |
| 26-Jul-2022 |
rin | Fix copy-paste in comment. No binary changes.
|
| 1.34 |
| 26-Jul-2022 |
rin | Fix inverted logic; cr was completely broken by FPU insn with Rc == 1.
Why haven't we noticed this so far...
|
| 1.33 |
| 15-Jul-2020 |
rin | Now, FPU emulation for booke and ibm4xx works fine at a level where
all the related ATF tests pass correctly. However, there still remain
problems:
- FEX and VX bits for FPSCR cannot be modified by mcrfs, mtfsf{,i},
and mtfsb[01].
- Invalid operations should be treated differently depending on
FPSCR[VE].
Therefore, comment them in order not to be forgotten.
No binary changes.
|
| 1.32 |
| 15-Jul-2020 |
rin | Try to fix FPSCR bits in the end of emulation:
- FPSCR[FEX] is not a sticky bit.
- Turn on FPSCR[FEX] if the emulated instruction causes invalid operation,
and invalid operation exception is not masked out.
- FPSCR[VX] is not a sticky bit, however it should be set when at least
one of FPSCR[VXfoo] bits (they are sticky!) is set.
- FPSCR[FX] is a sticky bit, and it should be set if FPSCR is modified by
instructions other than mtfsf{,i}.
|
| 1.31 |
| 15-Jul-2020 |
rin | Set ksi_code correctly via fpu_get_fault_code() for SIGFPE.
|
| 1.30 |
| 15-Jul-2020 |
rin | Do not raise SIGFPE unless MSR[FE0] or MSR[FE1] is set via fenv(3).
|
| 1.29 |
| 15-Jul-2020 |
rin | FPSCR[FEX] is not a sticky bit; it is always cleared when read from
userland via mffs on real hardware.
|
| 1.28 |
| 15-Jul-2020 |
rin | PR port-powerpc/55425
Fix emulation for mtfsf; source register is frB here.
Now, userland processes successfully change rounding mode, by which
FPU-optimized code in OpenSSL works just fine as far as I can see.
|
| 1.27 |
| 15-Jul-2020 |
rin | For trap instruction, ksi_code should be TRAP_BRKPT not TRAP_TRACE.
|
| 1.26 |
| 15-Jul-2020 |
rin | Do not set ksi->ksi_addr twice. No functional changes.
|
| 1.25 |
| 15-Jul-2020 |
rin | Remove old workaround foe cache problem on ibm4xx.
The problem seems gone already.
|
| 1.24 |
| 06-Jul-2020 |
rin | Include missing opt_ppcarch.h.
|
| 1.23 |
| 06-Jul-2020 |
rin | Style and cosmetic changes. No binary changes intended.
|
| 1.22 |
| 27-Jun-2020 |
rin | fpu_dumpfpn(): Add KASSERT to check argument != NULL.
|
| 1.21 |
| 27-Jun-2020 |
rin | fpu_dumpfpn(): Add missing \n in printf() format.
|
| 1.20 |
| 27-Jun-2020 |
rin | Sort headers. No functional changes intended.
|
| 1.19 |
| 28-Dec-2016 |
rin | PR port-powerpc/51368: powerpc FPU emulation fails for single precision
floating point arithmetic
For single precision instruction, calculate first in double precision,
and then round it. With this fix, single precision arithmetic gets sane
on ibm4xx and booke.
Taken from FreeBSD commit r258250:
https://svnweb.freebsd.org/base?view=revision&revision=258250
Ok matt and simonb.
|
| 1.18 |
| 15-Dec-2016 |
rin | Fix build without DDB.
|
| 1.17 |
| 12-Aug-2014 |
joerg | branches: 1.17.2; 1.17.4;
Avoid unncessary use of double in the kernel. With this change,
a LLVM build kernel fully works on TWRP1025.
|
| 1.16 |
| 23-Jul-2012 |
matt | branches: 1.16.2; 1.16.14; 1.16.18;
Add support for PPC FP emulation to BookE.
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.
|
| 1.15 |
| 18-Jan-2011 |
matt | branches: 1.15.6;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
|
| 1.14 |
| 11-Dec-2005 |
christos | branches: 1.14.100; 1.14.104; 1.14.106;
merge ktrace-lwp.
|
| 1.13 |
| 03-Jun-2005 |
scw | Appease -Wcast-qual
|
| 1.12 |
| 15-Sep-2004 |
scw | It helps to call fpu_sqrt() when dealing with the frsqrte instruction.
|
| 1.11 |
| 30-Mar-2004 |
simonb | Make the "cond" variable an unsigned variable. Stops sign extension
problems when we shift it left and right while creating the new value
for the condition register.
Fixes problems reported by Juergen Hannken-Illjes in toolchain/24938.
|
| 1.10 |
| 27-Oct-2003 |
simonb | branches: 1.10.2;
Fix a bogus uninitialised warning.
|
| 1.9 |
| 07-Aug-2003 |
agc | Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
|
| 1.8 |
| 15-Jul-2003 |
lukem | __KERNEL_RCSID()
|
| 1.7 |
| 07-Feb-2003 |
thorpej | branches: 1.7.2;
Fix some printf formats.
|
| 1.6 |
| 25-Nov-2002 |
thorpej | Avoid strict-alias warnings.
|
| 1.5 |
| 25-Nov-2002 |
thorpej | Remove an unnecessary token-paste, as pointed out by GCC 3.3.
|
| 1.4 |
| 24-Nov-2002 |
thorpej | Instrument FP emulation traps.
|
| 1.3 |
| 22-Jul-2001 |
wiz | branches: 1.3.6;
bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.
|
| 1.2 |
| 22-Jun-2001 |
simonb | branches: 1.2.2;
Make this compile when DEBUG isn't defined.
|
| 1.1 |
| 13-Jun-2001 |
simonb | Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
|
| 1.2.2.1 |
| 03-Aug-2001 |
lukem | update to -current
|
| 1.3.6.2 |
| 11-Dec-2002 |
thorpej | Sync with HEAD.
|
| 1.3.6.1 |
| 22-Jul-2001 |
thorpej | file fpu_emu.c was added on branch nathanw_sa on 2002-12-11 06:11:37 +0000
|
| 1.7.2.4 |
| 10-Nov-2005 |
skrll | Sync with HEAD. Here we go again...
|
| 1.7.2.3 |
| 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
| 1.7.2.2 |
| 18-Sep-2004 |
skrll | Sync with HEAD.
|
| 1.7.2.1 |
| 03-Aug-2004 |
skrll | Sync with HEAD
|
| 1.10.2.1 |
| 30-Mar-2004 |
jmc | Pullup rev 1.11 (requested by simonb in ticket #18)
Make the "cond" variable an unsigned variable. PR#24938
|
| 1.14.106.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.14.104.1 |
| 07-Jan-2011 |
matt | Adapt to new trapframe.
|
| 1.14.100.1 |
| 05-Mar-2011 |
rmind | sync with head
|
| 1.15.6.1 |
| 30-Oct-2012 |
yamt | sync with head
|
| 1.16.18.1 |
| 18-Jan-2017 |
skrll | Sync with netbsd-5
|
| 1.16.14.2 |
| 03-Jan-2017 |
snj | Pull up following revision(s) (requested by rin in ticket #1342):
sys/arch/powerpc/fpu/fpu_emu.c: revision 1.18
Fix build without DDB.
|
| 1.16.14.1 |
| 03-Jan-2017 |
snj | Pull up following revision(s) (requested by rin in ticket #1341):
sys/arch/powerpc/fpu/fpu_emu.c: revision 1.19
sys/arch/powerpc/fpu/fpu_explode.c: revision 1.7
- add missing default from FreeBSD
- remove duplicate panic pointed out by matt
--
PR port-powerpc/51368: powerpc FPU emulation fails for single precision
floating point arithmetic
For single precision instruction, calculate first in double precision,
and then round it. With this fix, single precision arithmetic gets sane
on ibm4xx and booke.
Taken from FreeBSD commit r258250:
https://svnweb.freebsd.org/base?view=revision&revision=258250
Ok matt and simonb.
|
| 1.16.2.1 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.17.4.1 |
| 07-Jan-2017 |
pgoyette | Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
|
| 1.17.2.1 |
| 05-Feb-2017 |
skrll | Sync with HEAD
|
