Lines Matching refs:WR4
64 #define WR4(sc, reg, val) \
146 #define WR4(sc, reg, val) \
153 WR4(sc, JH7110_TRNG_IENABLE,
163 WR4(sc, JH7110_TRNG_IENABLE, 0);
178 WR4(sc, JH7110_TRNG_ISTATUS,
200 WR4(sc, JH7110_TRNG_CTRL,
206 WR4(sc, JH7110_TRNG_CTRL,
252 WR4(sc, JH7110_TRNG_ISTATUS, istat);
267 WR4(sc, JH7110_TRNG_IENABLE, 0U);
268 WR4(sc, JH7110_TRNG_ISTATUS, ~0U);
270 WR4(sc, JH7110_TRNG_MODE, JH7110_TRNG_MODE_R256);
277 WR4(sc, JH7110_TRNG_CTRL, JH7110_TRNG_CTRL_RANDOM_RESEED);
Indexes created Mon Oct 20 10:10:01 GMT 2025