Cross Reference: /src/sys/arch/sun3/sun3x/pmap.c

Lines Matching refs:raw
758 		kernAbase[i].addr.raw = 0;
767 		kernAbase[i].attr.raw =
769 		kernAbase[i].addr.raw = mmu_vtop(&kernBbase[b]);
772 			kernBbase[b + j].attr.raw =
1002 		kpte[i].attr.raw = mon_ctbl[i];
1020 		kpte[i].attr.raw = mon_ctbl[i];
1053 		mon_dte[i].attr.raw = kernAbase[i].attr.raw;
1054 		mon_dte[i].addr.raw = kernAbase[i].addr.raw;
1156 			b_tbl->bt_dtbl[j].attr.raw = MMU_DT_INVALID;
1189 			c_tbl->ct_dtbl[j].attr.raw = MMU_DT_INVALID;
1301 		tbl->bt_parent->at_dtbl[tbl->bt_pidx].attr.raw = MMU_DT_INVALID;
1324 		tbl->ct_parent->bt_dtbl[tbl->ct_pidx].attr.raw = MMU_DT_INVALID;
1415 				dtbl = mmu_ptov(dte[i].addr.raw);
1421 				dte[i].attr.raw = MMU_DT_INVALID;
1464 				dte[i].attr.raw = MMU_DT_INVALID;
1502 				if (c_pte->attr.raw & MMU_SHORT_PTE_WIRED)
1590 		pv->pv_flags |= (u_short) pte->attr.raw;
1592 	pte->attr.raw = MMU_DT_INVALID;
1628 	*b_tbl = mmuB2tmgr(mmu_ptov(a_dte->addr.raw));
1792 		b_dte = mmu_ptov(a_dte->addr.raw);
1810 		a_dte->addr.raw = mmu_vtop(b_tbl->bt_dtbl);
1811 		a_dte->attr.raw = MMU_LONG_DTE_LU | MMU_DT_SHORT;
1862 		b_dte->attr.raw = mmu_vtop(c_tbl->ct_dtbl);
1863 		b_dte->attr.raw |= MMU_DT_SHORT;
1905 		if (c_pte->attr.raw & MMU_SHORT_PTE_WIRED) {
1944 			c_pte->attr.raw &= (MMU_SHORT_PTE_M
1966 		c_pte->attr.raw = 0;
1978 		c_pte->attr.raw |= MMU_SHORT_PTE_WIRED;
1990 	if (c_pte->attr.raw & ~(MMU_SHORT_PTE_M |
1996 	c_pte->attr.raw |= ((u_long) pa | MMU_DT_PAGE);
2003 		c_pte->attr.raw |= MMU_SHORT_PTE_WP;
2009 		c_pte->attr.raw |= MMU_SHORT_PTE_USED;
2011 			c_pte->attr.raw |= MMU_SHORT_PTE_M;
2021 		c_pte->attr.raw |= MMU_SHORT_PTE_CI;
2113 		    pte->attr.raw &= (MMU_SHORT_PTE_USED|MMU_SHORT_PTE_M);
2116 		pte->attr.raw = MMU_DT_INVALID;
2124 	pte->attr.raw |= (pa | MMU_DT_PAGE);
2127 		pte->attr.raw |= MMU_SHORT_PTE_WP;
2129 		pte->attr.raw |= MMU_SHORT_PTE_CI;
2158 	pte->attr.raw = MMU_DT_INVALID | MMU_DT_PAGE | (pa & MMU_PAGE_MASK);
2160 		pte->attr.raw |= MMU_SHORT_PTE_WP;
2162 		pte->attr.raw |= MMU_SHORT_PTE_CI;
2179 		kernCbase[idx++].attr.raw = MMU_DT_INVALID;
2228 		            pte->attr.raw |= MMU_SHORT_PTE_WP;
2323 		    b_tbl = (b_tmgr_t *) a_tbl->at_dtbl[a_idx].addr.raw;
2336 		      pte->attr.raw |= MMU_SHORT_PTE_WP;
2405 	if (!(pte->attr.raw & MMU_SHORT_PTE_WIRED))
2409 	pte->attr.raw &= ~(MMU_SHORT_PTE_WIRED);
2735 				pte->attr.raw |= MMU_SHORT_PTE_WP;
2741 				pv->pv_flags |= pte->attr.raw;
2743 				pte->attr.raw = MMU_DT_INVALID;
2889 		pte->attr.raw &= ~(flag);
3111 			b_dte = mmu_ptov(a_dte->addr.raw);
3141 				a_dte->attr.raw = MMU_DT_INVALID;
3171 				b_dte = mmu_ptov(a_dte->addr.raw);
3190 				a_dte->attr.raw = MMU_DT_INVALID;
3217 			b_dte = mmu_ptov(a_dte->addr.raw);
3235 				a_dte->attr.raw = MMU_DT_INVALID;
3310 				b_dte->attr.raw = MMU_DT_INVALID;
3335 				b_dte->attr.raw = MMU_DT_INVALID;
3359 				b_dte->attr.raw = MMU_DT_INVALID;
3405 			if (c_pte->attr.raw & MMU_SHORT_PTE_WIRED)
3661 	        b_tbl = mmuB2tmgr(mmu_ptov(a_tbl->at_dtbl[a_idx].addr.raw));
3713 	return (pte->attr.raw);
3731 	kernCbase[idx].attr.raw = pte;
3802 	rp.attr.raw = ~MMU_LONG_RP_LU;
3803 	rp.addr.raw = (unsigned int) a_tbl;
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