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Lines Matching defs:mif

264 		 * the MIF configuration register.
493 	/* Re-initialize the MIF */
501 	/* Mask all MIF interrupts, just in case */
502 	bus_space_write_4(t, mif, HME_MIFI_IMASK, 0xffff);
1104 		bus_space_handle_t mif = sc->sc_mif;
1106 		cf = bus_space_read_4(t, mif, HME_MIFI_CFG);
1107 		st = bus_space_read_4(t, mif, HME_MIFI_STAT);
1108 		sm = bus_space_read_4(t, mif, HME_MIFI_SM);
1180 	bus_space_handle_t mif = sc->sc_mif;
1192 	/* Configure the MIF in frame mode, no poll, current phy select */
1196 	bus_space_write_4(t, mif, HME_MIFI_CFG, v);
1214 	bus_space_handle_t mif = sc->sc_mif;
1223 	/* Select the desired PHY in the MIF configuration register */
1224 	v = mifi_cfg = bus_space_read_4(t, mif, HME_MIFI_CFG);
1228 	bus_space_write_4(t, mif, HME_MIFI_CFG, v);
1242 	 * the MIF configuration register's MDI_X bits. Note that
1247 	v = bus_space_read_4(t, mif, HME_MIFI_CFG);
1261 	bus_space_write_4(t, mif, HME_MIFI_FO, v);
1264 		v = bus_space_read_4(t, mif, HME_MIFI_FO);
1277 	bus_space_write_4(t, mif, HME_MIFI_CFG, mifi_cfg);
1288 	bus_space_handle_t mif = sc->sc_mif;
1297 	/* Select the desired PHY in the MIF configuration register */
1298 	v = mifi_cfg = bus_space_read_4(t, mif, HME_MIFI_CFG);
1302 	bus_space_write_4(t, mif, HME_MIFI_CFG, v);
1316 	 * the MIF configuration register's MDI_X bits. Note that
1321 	v = bus_space_read_4(t, mif, HME_MIFI_CFG);
1336 	bus_space_write_4(t, mif, HME_MIFI_FO, v);
1339 		v = bus_space_read_4(t, mif, HME_MIFI_FO);
1350 	bus_space_write_4(t, mif, HME_MIFI_CFG, mifi_cfg);
1390 	bus_space_handle_t mif = sc->sc_mif;
1402 	/* Select the current PHY in the MIF configuration register */
1403 	v = bus_space_read_4(t, mif, HME_MIFI_CFG);
1407 	bus_space_write_4(t, mif, HME_MIFI_CFG, v);