Lines Matching defs:bank
95 MEMECC_SYN_BANK_C | 10, /* 0x07: Bank C 10/26 */
99 MEMECC_SYN_BANK_C | 13, /* 0x0b: Bank C 13/29 */
101 MEMECC_SYN_BANK_D | 1, /* 0x0d: Bank D 1/17 */
102 MEMECC_SYN_BANK_D | 2, /* 0x0e: Bank D 2/18 */
107 MEMECC_SYN_BANK_C | 14, /* 0x13: Bank C 14/30 */
109 MEMECC_SYN_BANK_D | 4, /* 0x15: Bank D 4/20 */
110 MEMECC_SYN_BANK_D | 5, /* 0x16: Bank D 5/21 */
113 MEMECC_SYN_BANK_D | 8, /* 0x19: Bank D 8/24 */
114 MEMECC_SYN_BANK_D | 9, /* 0x1a: Bank D 9/25 */
116 MEMECC_SYN_BANK_D | 10, /* 0x1c: Bank D 10/26 */
123 MEMECC_SYN_BANK_C | 0, /* 0x23: Bank C 0/16 */
125 MEMECC_SYN_BANK_D | 7, /* 0x25: Bank D 7/23 */
126 MEMECC_SYN_BANK_D | 6, /* 0x26: Bank D 6/22 */
129 MEMECC_SYN_BANK_A | 15, /* 0x29: Bank A 15/31 */
130 MEMECC_SYN_BANK_D | 12, /* 0x2a: Bank D 12/28 */
132 MEMECC_SYN_BANK_D | 13, /* 0x2c: Bank D 13/29 */
137 MEMECC_SYN_BANK_A | 14, /* 0x31: Bank A 14/30 */
138 MEMECC_SYN_BANK_A | 0, /* 0x32: Bank A 0/16 */
140 MEMECC_SYN_BANK_A | 1, /* 0x34: Bank A 1/17 */
144 MEMECC_SYN_BANK_A | 2, /* 0x38: Bank A 2/18 */
149 MEMECC_SYN_BANK_C | 3, /* 0x3d: Bank C 3/19 */
155 MEMECC_SYN_BANK_C | 1, /* 0x43: Bank C 1/17 */
157 MEMECC_SYN_BANK_C | 4, /* 0x45: Bank C 4/20 */
158 MEMECC_SYN_BANK_C | 8, /* 0x46: Bank C 8/24 */
161 MEMECC_SYN_BANK_C | 7, /* 0x49: Bank C 7/23 */
162 MEMECC_SYN_BANK_D | 15, /* 0x4a: Bank D 15/31 */
164 MEMECC_SYN_BANK_D | 14, /* 0x4c: Bank D 14/30 */
167 MEMECC_SYN_BANK_B | 3, /* 0x4f: Bank B 3/19 */
169 MEMECC_SYN_BANK_B | 4, /* 0x51: Bank B 4/20 */
170 MEMECC_SYN_BANK_B | 7, /* 0x52: Bank B 7/23 */
172 MEMECC_SYN_BANK_A | 4, /* 0x54: Bank A 4/20 */
176 MEMECC_SYN_BANK_A | 5, /* 0x58: Bank A 5/21 */
185 MEMECC_SYN_BANK_B | 5, /* 0x61: Bank B 5/21 */
186 MEMECC_SYN_BANK_B | 6, /* 0x62: Bank B 6/22 */
188 MEMECC_SYN_BANK_A | 8, /* 0x64: Bank A 8/24 */
192 MEMECC_SYN_BANK_A | 9, /* 0x68: Bank A 9/25 */
200 MEMECC_SYN_BANK_A | 10, /* 0x70: Bank A 10/26 */
210 MEMECC_SYN_BANK_C | 11, /* 0x7a: Bank C 11/27 */
219 MEMECC_SYN_BANK_C | 2, /* 0x83: Bank C 2/18 */
221 MEMECC_SYN_BANK_C | 5, /* 0x85: Bank C 5/21 */
222 MEMECC_SYN_BANK_C | 9, /* 0x86: Bank C 9/25 */
225 MEMECC_SYN_BANK_C | 6, /* 0x89: Bank C 6/22 */
226 MEMECC_SYN_BANK_C | 12, /* 0x8a: Bank C 12/28 */
228 MEMECC_SYN_BANK_D | 0, /* 0x8c: Bank D 0/16 */
233 MEMECC_SYN_BANK_B | 8, /* 0x91: Bank B 8/24 */
234 MEMECC_SYN_BANK_C | 15, /* 0x92: Bank C 15/31 */
236 MEMECC_SYN_BANK_A | 7, /* 0x94: Bank A 7/23 */
240 MEMECC_SYN_BANK_A | 6, /* 0x98: Bank A 6/22 */
246 MEMECC_SYN_BANK_B | 11, /* 0x9e: Bank B 11/27 */
249 MEMECC_SYN_BANK_B | 9, /* 0xa1: Bank B 9/25 */
250 MEMECC_SYN_BANK_B | 12, /* 0xa2: Bank B 12/28 */
252 MEMECC_SYN_BANK_B | 15, /* 0xa4: Bank B 15/31 */
255 MEMECC_SYN_BANK_A | 11, /* 0xa7: Bank A 11/27 */
256 MEMECC_SYN_BANK_A | 12, /* 0xa8: Bank A 12/28 */
264 MEMECC_SYN_BANK_A | 13, /* 0xb0: Bank A 13/29 */
281 MEMECC_SYN_BANK_B | 10, /* 0xc1: Bank B 10/26 */
282 MEMECC_SYN_BANK_B | 13, /* 0xc2: Bank B 13/29 */
284 MEMECC_SYN_BANK_B | 14, /* 0xc4: Bank B 14/30 */
288 MEMECC_SYN_BANK_B | 0, /* 0xc8: Bank B 0/16 */
296 MEMECC_SYN_BANK_B | 1, /* 0xd0: Bank B 1/17 */
299 MEMECC_SYN_BANK_A | 3, /* 0xd3: Bank A 3/19 */
312 MEMECC_SYN_BANK_B | 2, /* 0xe0: Bank B 2/18 */
321 MEMECC_SYN_BANK_D | 11, /* 0xe9: Bank D 11/27 */
332 MEMECC_SYN_BANK_D | 3, /* 0xf4: Bank D 3/19 */
572 int syncode, bank, bitnum;
577 bank = (syncode >> MEMECC_SYN_BANK_SHIFT) &MEMECC_SYN_BANK_MASK;
586 addr |= (u_int32_t) (bank << 2);
588 "DRAM Bank %c, Bit#%d", 'A' + bank, bitnum);