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Lines Matching defs:regval

262 	u32 regval;
275 		regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
276 		regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
277 		IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);
282 		regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
283 		regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN |
285 		IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
1369 	u32 regval;
1377 		regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
1378 		regval |= IXGBE_DCA_TXCTRL_DESC_WRO_EN;
1379 		IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);
1384 		regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
1385 		regval |= IXGBE_DCA_RXCTRL_DATA_WRO_EN |
1387 		IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
1435  * @regval: register value to write to RXCTRL
1439 s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval)
1443 	IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, regval);