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Lines Matching refs:hic

507 	} hic;
513 		memset(&hic, 0, sizeof(hic));
514 		hic.cmd.hdr.cmd = FW_PHY_ACT_REQ_CMD;
515 		hic.cmd.hdr.buf_len = FW_PHY_ACT_REQ_LEN;
516 		hic.cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;
517 		hic.cmd.port_number = hw->bus.lan_id;
518 		hic.cmd.activity_id = IXGBE_CPU_TO_LE16(activity);
520 			hic.cmd.data[i] = IXGBE_CPU_TO_BE32((*data)[i]);
522 		rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
523 						  sizeof(hic.cmd),
528 		if (hic.rsp.hdr.cmd_or_resp.ret_status ==
531 				(*data)[i] = IXGBE_BE32_TO_CPU(hic.rsp.data[i]);
1505 	} hic;
1509 	memset(&hic, 0, sizeof(hic));
1510 	hic.cmd.hdr.cmd = FW_INT_PHY_REQ_CMD;
1511 	hic.cmd.hdr.buf_len = FW_INT_PHY_REQ_LEN;
1512 	hic.cmd.hdr.checksum = FW_DEFAULT_CHECKSUM;
1513 	hic.cmd.port_number = hw->bus.lan_id;
1514 	hic.cmd.command_type = FW_INT_PHY_REQ_READ;
1515 	hic.cmd.address = IXGBE_CPU_TO_BE16(reg_addr);
1517 	status = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,
1518 					      sizeof(hic.cmd),
1522 	*data = IXGBE_BE32_TO_CPU(hic.rsp.read_data);