Lines Matching defs:regw
327 regw(struct mach64_softc *sc, uint32_t index, uint32_t data)
357 regw(sc, CLOCK_CNTL, reg);
362 regw(sc, CLOCK_CNTL, reg);
364 regw(sc, CLOCK_CNTL, reg);
806 regw(sc, BUS_CNTL, reg);
1124 regw(sc, CRTC_H_TOTAL_DISP, crtc->h_total_disp);
1125 regw(sc, CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid);
1126 regw(sc, CRTC_V_TOTAL_DISP, crtc->v_total_disp);
1127 regw(sc, CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid);
1129 regw(sc, CRTC_VLINE_CRNT_VLINE, 0);
1131 regw(sc, CRTC_OFF_PITCH, (sc->stride >> 3) << 22);
1133 regw(sc, CRTC_GEN_CNTL, crtc->gen_cntl | crtc->color_depth |
1161 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) & ~GUI_ENGINE_ENABLE);
1164 regw(sc, GEN_TEST_CNTL, regr(sc, GEN_TEST_CNTL) | GUI_ENGINE_ENABLE);
1168 regw
1186 regw(sc, CONTEXT_MASK, 0xffffffff);
1188 regw(sc, DST_OFF_PITCH, (pitch_value >> 3) << 22);
1191 regw(sc, CRTC_OFF_PITCH, (sc->stride >> 3) << 22);
1193 regw(sc, DST_Y_X, 0);
1194 regw(sc, DST_HEIGHT, 0);
1195 regw(sc, DST_BRES_ERR, 0);
1196 regw(sc, DST_BRES_INC, 0);
1197 regw(sc, DST_BRES_DEC, 0);
1199 regw(sc, DST_CNTL, DST_LAST_PEL | DST_X_LEFT_TO_RIGHT |
1202 regw(sc, SRC_OFF_PITCH, (pitch_value >> 3) << 22);
1204 regw(sc, SRC_Y_X, 0);
1205 regw(sc, SRC_HEIGHT1_WIDTH1, 1);
1206 regw(sc, SRC_Y_X_START, 0);
1207 regw(sc, SRC_HEIGHT2_WIDTH2, 1);
1209 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
1212 regw(sc, HOST_CNTL, 0);
1214 regw(sc, PAT_REG0, 0);
1215 regw(sc, PAT_REG1, 0);
1216 regw(sc, PAT_CNTL, 0);
1218 regw(sc, SC_LEFT, 0);
1219 regw(sc, SC_TOP, 0);
1220 regw(sc, SC_BOTTOM, 0x3fff);
1221 regw(sc, SC_RIGHT, pitch_value - 1);
1223 regw(sc, DP_BKGD_CLR, WS_DEFAULT_BG);
1224 regw(sc, DP_FRGD_CLR, WS_DEFAULT_FG);
1225 regw(sc, DP_WRITE_MASK, 0xffffffff);
1226 regw(sc, DP_MIX, (MIX_SRC << 16) | MIX_DST);
1228 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR);
1231 regw(sc, CLR_CMP_CLR, 0);
1232 regw(sc, CLR_CMP_MASK, 0xffffffff);
1233 regw(sc, CLR_CMP_CNTL, 0);
1238 regw(sc, DP_PIX_WIDTH, HOST_1BPP | SRC_8BPP | DST_8BPP);
1239 regw(sc, DP_CHAIN_MASK, DP_CHAIN_8BPP);
1241 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN);
1244 regw(sc, DP_PIX_WIDTH, HOST_1BPP | SRC_32BPP | DST_32BPP);
1245 regw(sc, DP_CHAIN_MASK, DP_CHAIN_32BPP);
1246 regw(sc, DAC_CNTL, regr(sc, DAC_CNTL) | DAC_8BIT_EN);
1249 regw(sc, DP_WRITE_MASK, 0xff);
1252 regw(sc, CRTC_INT_CNTL, regr(sc, CRTC_INT_CNTL) & ~0x20);
1253 regw(sc, GUI_TRAJ_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
1266 regw(sc, CRTC_OFF_PITCH, (regr(sc, CRTC_OFF_PITCH) & 0xfff00000) |
1366 regw(sc, DSP_ON_OFF, ((dsp_on << 16) & DSP_ON) | (dsp_off & DSP_OFF));
1367 regw(sc, DSP_CONFIG, ((dsp_precision << 20) & DSP_PRECISION) |
1433 regw(sc, CLOCK_CNTL, clockreg);
1667 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP);
1668 regw(sc, DP_SRC, MONO_SRC_ONE | BKGD_SRC_HOST | FRGD_SRC_HOST);
1669 regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC);
1670 regw(sc, CLR_CMP_CNTL ,0); /* no transparency */
1671 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
1672 regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT);
1673 regw(sc, HOST_CNTL, HOST_BYTE_ALIGN);
1674 regw(sc, SRC_Y_X, 0);
1675 regw(sc, SRC_WIDTH1, wi);
1676 regw(sc, DST_Y_X, (x << 16) | y);
1677 regw(sc, DST_HEIGHT_WIDTH, (wi << 16) | he);
1837 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP);
1838 regw(sc, DP_SRC, FRGD_SRC_BLIT);
1839 regw(sc, DP_MIX, (rop & 0xffff) << 16);
1840 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */
1850 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
1855 regw(sc, SRC_CNTL, SRC_LINE_X_RIGHT_TO_LEFT);
1857 regw(sc, DST_CNTL, dest_ctl);
1859 regw(sc, SRC_Y_X, (xs << 16) | ys);
1860 regw(sc, SRC_WIDTH1, width);
1861 regw(sc, DST_Y_X, (xd << 16) | yd);
1862 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height);
1870 regw(sc, DP_WRITE_MASK, 0xff); /* XXX only good for 8 bit */
1871 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_1BPP | HOST_1BPP);
1872 regw(sc, DP_SRC, MONO_SRC_HOST | BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR);
1873 regw(sc, DP_MIX, ((MIX_SRC & 0xffff) << 16) | MIX_SRC);
1874 regw(sc, CLR_CMP_CNTL ,0); /* no transparency */
1875 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
1876 regw(sc, DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT);
1877 regw(sc, HOST_CNTL, HOST_BYTE_ALIGN);
1878 regw(sc, DP_BKGD_CLR, bg);
1879 regw(sc, DP_FRGD_CLR, fg);
1880 regw(sc, SRC_Y_X, 0);
1881 regw(sc, SRC_WIDTH1, width);
1882 regw(sc, DST_Y_X, (xd << 16) | yd);
1883 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height);
1899 regw(sc, HOST_DATA0 + reg, latch);
1907 regw(sc, HOST_DATA0 + reg, latch);
1916 regw(sc, DP_FRGD_CLR, colour);
1917 regw(sc, DP_PIX_WIDTH, DST_8BPP | SRC_8BPP | HOST_8BPP);
1918 regw(sc, DP_SRC, FRGD_SRC_FRGD_CLR);
1919 regw(sc, DP_MIX, MIX_SRC << 16);
1920 regw(sc, CLR_CMP_CNTL, 0); /* no transparency */
1921 regw(sc, SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT);
1922 regw(sc, DST_CNTL, DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM);
1924 regw(sc, SRC_Y_X, (x << 16) | y);
1925 regw(sc, SRC_WIDTH1, width);
1926 regw(sc, DST_Y_X, (x << 16) | y);
1927 regw(sc, DST_HEIGHT_WIDTH, (width << 16) | height);
2109 regw(sc, CRTC_GEN_CNTL, reg & ~(MACH64_BLANK));
2114 regw(sc, CRTC_GEN_CNTL, reg | (MACH64_BLANK));
Indexes created Thu Oct 02 01:09:59 GMT 2025