Lines Matching refs:pd
401 query_bus(pciconf_bus_t *parent, pciconf_dev_t *pd, int dev)
416 set_busreg(parent->pc, pd->tag, parent->busno, pb->busno, 0xff);
429 io = pci_conf_read(parent->pc, pd->tag, PCI_BRIDGE_STATIO_REG);
436 pmem = pci_conf_read(parent->pc, pd->tag,
453 set_busreg(parent->pc, pd->tag, parent->busno, pb->busno,
467 pi->dev = pd;
486 pm->dev = pd;
504 pm->dev = pd;
537 pci_bar_is_reserved(pciconf_bus_t *pb, pciconf_dev_t *pd, int br)
546 if (pd->ppb)
549 tag = pd->tag;
591 pciconf_dev_t *pd;
598 pd = &pb->device[pb->ndevs];
599 pd->pc = pb->pc;
600 pd->tag = tag;
601 pd->ppb = NULL;
602 pd->enable = mode;
603 pd->ea_cap_ptr = 0;
610 if (pci_get_capability(pb->pc, tag, PCI_CAP_EA, &pd->ea_cap_ptr,
640 pd->ppb = query_bus(pb, pd, dev);
641 if (pd->ppb == NULL)
662 pd->ipin = PCI_INTERRUPT_PIN(icr);
663 pd->iline = PCI_INTERRUPT_LINE(icr);
664 pd->min_gnt = PCI_MIN_GNT(icr);
665 pd->max_lat = PCI_MAX_LAT(icr);
666 if (pd->iline || pd->ipin) {
667 pci_conf_interrupt(pb->pc, pb->busno, dev, pd->ipin, pb->swiz,
668 &pd->iline);
670 icr |= (pd->iline << PCI_INTERRUPT_LINE_SHIFT);
674 if (pd->min_gnt != 0 || pd->max_lat != 0) {
675 if (pd->min_gnt != 0 && pd->min_gnt > pb->max_mingnt)
676 pb->max_mingnt = pd->min_gnt;
678 if (pd->max_lat != 0 && pd->max_lat < pb->min_maxlat)
679 pb->min_maxlat = pd->max_lat;
681 pb->bandwidth_used += pd->min_gnt * 4000000 /
682 (pd->min_gnt + pd->max_lat);
723 pi->dev = pd;
786 pm->dev = pd;
823 pm->dev = pd;
847 pd->enable &= ~PCI_CONF_ENABLE_ROM;
914 pciconf_dev_t *pd;
922 pd = pi->dev;
923 rsvd = pci_bar_is_reserved(pb, pd, pi->reg);
928 pd->enable &= ~PCI_CONF_ENABLE_IO;
935 print_tag(pd->pc, pd->tag);
940 if (pd->ppb && pi->reg == 0) {
941 error = init_range_resource(&pd->ppb->io_res,
944 print_tag(pd->pc, pd->tag);
946 pd->ppb->busno);
953 pd->enable &= ~PCI_CONF_ENABLE_IO;
955 pd->enable |= PCI_CONF_ENABLE_IO;
959 print_tag(pd->pc, pd->tag);
963 pci_conf_write(pd->pc, pd->tag, pi->reg,
976 pciconf_dev_t *pd;
988 pd = pm->dev;
989 rsvd = pci_bar_is_reserved(pb, pd, pm->reg);
996 ok64 = pb->mem_64bit && pd->ppb == NULL;
1007 base = pci_conf_read(pd->pc, pd->tag, pm->reg);
1020 print_tag(pd->pc, pd->tag);
1027 if (pd->ppb && pm->reg == 0) {
1030 r = pm->prefetch ? &pd->ppb->pmem_res
1031 : &pd->ppb->mem_res;
1035 print_tag(pd->pc, pd->tag);
1037 pd->ppb->busno);
1044 pd->enable &= ~PCI_CONF_ENABLE_MEM;
1046 pd->enable |= PCI_CONF_ENABLE_MEM;
1050 print_tag(pd->pc, pd->tag);
1056 base = pci_conf_read(pd->pc, pd->tag, pm->reg);
1059 pci_conf_write(pd->pc, pd->tag, pm->reg, base);
1064 pci_conf_write(pd->pc, pd->tag, pm->reg + 4,
1077 if (!pci_bar_is_reserved(pb, pd, pm->reg)) {
1084 pd = pm->dev;
1085 if (!(pd->enable & PCI_CONF_MAP_ROM))
1088 print_tag(pd->pc, pd->tag);
1095 if (pd->enable & PCI_CONF_ENABLE_ROM)
1098 pci_conf_write(pd->pc, pd->tag, pm->reg, base);
1133 configure_bridge(pciconf_dev_t *pd)
1142 pb = pd->ppb;
1164 io = pci_conf_read(pb->pc, pd->tag, PCI_BRIDGE_STATIO_REG) &
1170 pci_conf_write(pb->pc, pd->tag, PCI_BRIDGE_STATIO_REG, io);
1171 pci_conf_write(pb->pc, pd->tag, PCI_BRIDGE_IOHIGH_REG, iohigh);
1194 pd->tag, PCI_BRIDGE_MEMORY_REG, mem);
1197 mem = pci_conf_read(pb->pc, pd->tag, PCI_BRIDGE_PREFETCHMEM_REG);
1220 pci_conf_write(pb->pc, pd->tag, PCI_BRIDGE_PREFETCHMEM_REG, mem);
1227 pci_conf_write(pb->pc, pd->tag,
1229 pci_conf_write(pb->pc, pd->tag,
1240 cmd = pci_conf_read(pd->pc, pd->tag, PCI_BRIDGE_CONTROL_REG);
1246 pci_conf_write(pd->pc, pd->tag, PCI_BRIDGE_CONTROL_REG, cmd);
1247 cmd = pci_conf_read(pd->pc, pd->tag, PCI_COMMAND_STATUS_REG);
1249 pci_conf_write(pd->pc, pd->tag, PCI_COMMAND_STATUS_REG, cmd);
1263 pciconf_dev_t *pd;
1305 for (pd = pb->device; pd < &pb->device[pb->ndevs]; pd++) {
1310 print_tag(pd->pc, pd->tag);
1313 classreg = pci_conf_read(pd->pc, pd->tag, PCI_CLASS_REG);
1314 misc = pci_conf_read(pd->pc, pd->tag, PCI_BHLC_REG);
1315 cmd = pci_conf_read(pd->pc, pd->tag, PCI_COMMAND_STATUS_REG);
1316 if (pd->enable & PCI_CONF_ENABLE_PARITY)
1318 if (pd->enable & PCI_CONF_ENABLE_SERR)
1324 if (pd->enable & PCI_CONF_ENABLE_IO)
1326 if (pd->enable & PCI_CONF_ENABLE_MEM)
1328 if (pd->enable & PCI_CONF_ENABLE_BM)
1330 ltim = pd->min_gnt * bus_mhz / 4;
1336 if ((pd->enable &
1338 print_tag(pd->pc, pd->tag);
1343 pci_conf_write(pd->pc, pd->tag, PCI_COMMAND_STATUS_REG, cmd);
1350 pci_conf_write(pd->pc, pd->tag, PCI_BHLC_REG, misc);
1352 if (pd->ppb) {
1353 if (configure_bridge(pd) < 0)
Indexes created Mon Oct 20 20:10:13 GMT 2025