Lines Matching refs:RREG32
163 tmp = RREG32(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
167 tmp = RREG32(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
254 tmp = RREG32(RADEON_MC_STATUS);
269 RREG32(RADEON_MC_STATUS));
283 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
297 r = RREG32(RS480_NB_MC_DATA);
322 tmp = RREG32(RADEON_HOST_PATH_CNTL);
324 tmp = RREG32(RADEON_BUS_CNTL);
337 tmp = RREG32(RS690_HDP_FB_LOCATION);
340 tmp = RREG32(RADEON_AGP_BASE);
342 tmp = RREG32(RS480_AGP_BASE_2);
344 tmp = RREG32(RADEON_MC_AGP_LOCATION);
452 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
482 RREG32(R_000E40_RBBM_STATUS),
483 RREG32(R_0007C0_CP_STAT));
556 RREG32(R_000E40_RBBM_STATUS),
557 RREG32(R_0007C0_CP_STAT));
Indexes created Thu Nov 06 07:09:58 GMT 2025