Lines Matching defs:ah
21 #include "ah.h"
31 static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
33 static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
36 static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
37 static void ar5211DisablePCIE(struct ath_hal *ah);
173 static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah);
180 ar5211GetRadioRev(struct ath_hal *ah)
185 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16);
187 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000);
188 val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
202 struct ath_hal *ah;
218 ah = &ahp->ah_priv.h;
221 ah->ah_sc = sc;
222 ah->ah_st = st;
223 ah->ah_sh = sh;
225 ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */
226 AH_PRIVATE(ah)->ah_devid = devid;
227 AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */
229 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
230 AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */
240 if (!ar5211ChipReset(ah, AH_FALSE)) { /* reset chip */
241 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
245 if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) {
247 OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM);
248 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
253 val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
254 AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
255 AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;
257 if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 ||
258 AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) {
259 HALDEBUG(ah, HAL_DEBUG_ANY,
261 __func__, AH_PRIVATE(ah)->ah_macVersion);
266 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
268 if (!ar5211ChipTest(ah)) {
269 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
276 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) {
277 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
279 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047);
284 AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah);
285 if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) {
286 HALDEBUG(ah, HAL_DEBUG_ANY,
288 "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
293 val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>
296 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size "
301 ecode = ath_hal_legacyEepromAttach(ah);
307 if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU &&
308 ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
310 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007);
312 AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah);
315 OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
317 if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) {
318 HALDEBUG(ah, HAL_DEBUG_ANY,
321 AH_PRIVATE(ah)->ah_analog2GhzRev);
326 ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE);
329 ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
331 HALDEBUG(ah, HAL_DEBUG_ANY,
336 AH_PRIVATE(ah)->ah_currentRD = eeval;
337 AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust;
342 (void) ar5211FillCapabilityInfo(ah);
345 ar5211InitializeGainValues(ah);
347 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
349 HALDEBUG(ah, HAL_DEBUG_ANY,
354 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
356 return ah;
367 ar5211Detach(struct ath_hal *ah)
369 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
371 HALASSERT(ah != AH_NULL);
372 HALASSERT(ah->ah_magic == AR5211_MAGIC);
374 ath_hal_eepromDetach(ah);
375 ath_hal_free(ah);
379 ar5211ChipTest(struct ath_hal *ah)
392 regHold[i] = OS_REG_READ(ah, addr);
395 OS_REG_WRITE(ah, addr, wrData);
396 rdData = OS_REG_READ(ah, addr);
398 HALDEBUG(ah, HAL_DEBUG_ANY,
406 OS_REG_WRITE(ah, addr, wrData);
407 rdData = OS_REG_READ(ah, addr);
409 HALDEBUG(ah, HAL_DEBUG_ANY,
415 OS_REG_WRITE(ah, regAddr[i], regHold[i]);
425 ar5211GetChannelEdges(struct ath_hal *ah,
433 if (flags & CHANNEL_2GHZ && ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
442 ar5211GetChipPowerLimits(struct ath_hal *ah, HAL_CHANNEL *chans, uint32_t nchans)
450 HALDEBUG(ah, HAL_DEBUG_ATTACH,
460 ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
465 ar5211DisablePCIE(struct ath_hal *ah)
473 ar5211FillCapabilityInfo(struct ath_hal *ah)
475 struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
480 if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
482 if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
485 if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
505 if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
506 ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
Indexes created Thu Oct 23 18:09:57 GMT 2025