Lines Matching refs:xd1
295 { "MEM_LOAD_UOPS_RETIRED.L1_HIT", 0xd1, 0x01, true },
296 { "MEM_LOAD_UOPS_RETIRED.L1_MISS", 0xd1, 0x08, true },
297 { "MEM_LOAD_UOPS_RETIRED.L2_HIT", 0xd1, 0x02, true },
298 { "MEM_LOAD_UOPS_RETIRED.L2_MISS", 0xd1, 0x10, true },
299 { "MEM_LOAD_UOPS_RETIRED.HITM", 0xd1, 0x20, true },
300 { "MEM_LOAD_UOPS_RETIRED.WCB_HIT", 0xd1, 0x40, true },
301 { "MEM_LOAD_UOPS_RETIRED.DRAM_HIT", 0xd1, 0x80, true },
496 { "MEM_LOAD_RETIRED.L1_HIT", 0xd1, 0x01, true },
497 { "MEM_LOAD_RETIRED.L2_HIT", 0xd1, 0x02, true },
498 { "MEM_LOAD_RETIRED.L3_HIT", 0xd1, 0x04, true },
499 { "MEM_LOAD_RETIRED.L1_MISS", 0xd1, 0x08, true },
500 { "MEM_LOAD_RETIRED.L2_MISS", 0xd1, 0x10, true },
501 { "MEM_LOAD_RETIRED.L3_MISS", 0xd1, 0x20, true },
502 { "MEM_LOAD_RETIRED.FB_HIT", 0xd1, 0x40, true },
729 { "MEM_LOAD_RETIRED.L1_HIT", 0xd1, 0x01, true },
730 { "MEM_LOAD_RETIRED.L2_HIT", 0xd1, 0x02, true },
731 { "MEM_LOAD_RETIRED.L3_HIT", 0xd1, 0x04, true },
732 { "MEM_LOAD_RETIRED.L1_MISS", 0xd1, 0x08, true },
733 { "MEM_LOAD_RETIRED.L2_MISS", 0xd1, 0x10, true },
734 { "MEM_LOAD_RETIRED.L3_MISS", 0xd1, 0x20, true },
735 { "MEM_LOAD_RETIRED.FB_HIT", 0xd1, 0x40, true },
775 { "MEM_LOAD_RETIRED.LOCAL_PMM", 0xd1, 0x80, true },
1097 { "ExRetCond", 0xd1, 0x00, true },
1237 { "ExRetCond", 0xd1, 0x00, true },
Indexes created Mon Oct 20 16:09:52 GMT 2025