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History log of /src/usr.sbin/tprof/arch/tprof_x86.c
RevisionDateAuthorComments
 1.19  07-Jul-2023  msaitoh tprof(8): Add support for Skylake-X and Cascade Lake.
 1.18  07-Jul-2023  msaitoh Modify comment. No functional change.
 1.17  12-Apr-2023  msaitoh KNF. No functional change.
 1.16  10-Apr-2023  msaitoh Add Cometlake support.
 1.15  08-Dec-2022  msaitoh branches: 1.15.2;
Add AMD family 19h (zen3 and zen4) support to tprof.
 1.14  08-Dec-2022  msaitoh Use lowercase consistently for hexadecimal numbers. No functional change.
 1.13  07-Dec-2022  msaitoh KNF. No functional change.
 1.12  13-Jun-2022  msaitoh Disable the unsupported events from the bit vector length in EAX.
 1.11  13-Jun-2022  msaitoh Add topdown-slots to Intel architectural performance monitoring version 1.
 1.10  17-Apr-2020  knakahara Fix typo in a comment.
 1.9  11-Oct-2019  jmcneill Add support for AMD Family 15h
 1.8  29-May-2019  maxv branches: 1.8.2; 1.8.4;
Add support for AMD Family 17h.
 1.7  26-Nov-2018  knakahara tprof: Add goldmont plus support. Tested by msaitoh@n.o, thanks.
 1.6  26-Nov-2018  knakahara tprof: Add goldmont support.

I tested on Atom C3558 (Denverton).
 1.5  15-Nov-2018  knakahara tprof: Add silvermont, airmont support.

I tested on Atom C2758 (Rangeley).
 1.4  14-Jul-2018  maxv branches: 1.4.2;
Finish the Skylake/Kabylake table, and improve the output of "tprof analyze".
 1.3  13-Jul-2018  maxv Skylake/Kabylake are family 6, so add a check for that. While here improve
the layout of "tprof list".
 1.2  13-Jul-2018  maxv Inline the values in amd_f10h_names[], we're not going to use defines for
each CPU model found in the wild.
 1.1  13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.4.2.4  26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.4.2.3  26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.4.2.2  28-Jul-2018  pgoyette Sync with HEAD
 1.4.2.1  14-Jul-2018  pgoyette file tprof_x86.c was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.8.4.3  01-Aug-2023  martin Pull up the following revisions, requested by msaitoh in ticket #1697:

usr.sbin/tprof/tprof.8 1.16,1.22,1.25,1.29 via patch
usr.sbin/tprof/tprof_analyze.c 1.4
usr.sbin/tprof/arch/tprof_x86.c 1.13-1.19
sys/dev/tprof/tprof.c 1.23 via patch
sys/dev/tprof/tprof_x86_amd.c 1.7-1.8 via patch
sys/dev/tprof/tprof_x86_intel.c 1.8 via patch

- Add AMD family 19h (zen3 and zen4) support.
- Add Intel Comet Lake support.
- Add support for Intel Skylake-X and Cascade Lake.
- Print the path that we failed to open on error.
- Use lowercase consistently for hexadecimal numbers.
- KNF
 1.8.4.2  15-Oct-2022  martin Pull up following revision(s) (requested by msaitoh in ticket #1543):

sys/dev/tprof/tprof_x86_intel.c: revision 1.4
usr.sbin/tprof/arch/tprof_x86.c: revision 1.10
usr.sbin/tprof/arch/tprof_x86.c: revision 1.11
usr.sbin/tprof/arch/tprof_x86.c: revision 1.12

Fix typo in a comment.

Use CPUID_PERF_* macros defined in specialreg.h. No functional change.

Add topdown-slots to Intel architectural performance monitoring version 1.

Disable the unsupported events from the bit vector length in EAX.
 1.8.4.1  12-Oct-2019  martin Pull up following revision(s) (requested by jmcneill in ticket #301):

usr.sbin/tprof/tprof.8: revision 1.15
sys/dev/tprof/tprof_x86_amd.c: revision 1.5
usr.sbin/tprof/arch/tprof_x86.c: revision 1.9

Match Family 15h

-

Add support for AMD Family 15h

-

Add AMD Family 15h to supported model list
 1.8.2.4  21-Apr-2020  martin Sync with HEAD
 1.8.2.3  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.8.2.2  10-Jun-2019  christos Sync with HEAD
 1.8.2.1  29-May-2019  christos file tprof_x86.c was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.15.2.2  29-Jul-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #255):

usr.sbin/tprof/arch/tprof_x86.c: revision 1.18
usr.sbin/tprof/arch/tprof_x86.c: revision 1.19

Modify comment. No functional change.

tprof(8): Add support for Skylake-X and Cascade Lake.
 1.15.2.1  21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #210):

usr.sbin/tprof/tprof.8: revision 1.30
sys/dev/tprof/tprof_x86_amd.c: revision 1.8
sys/dev/tprof/tprof_armv8.c: revision 1.20
sys/dev/tprof/tprof_types.h: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.6
sys/dev/tprof/tprof_x86_intel.c: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.8
sys/dev/tprof/tprof.c: revision 1.23
usr.sbin/tprof/tprof.8: revision 1.25
usr.sbin/tprof/tprof.8: revision 1.26
usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
usr.sbin/tprof/tprof.8: revision 1.27
usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
usr.sbin/tprof/tprof.8: revision 1.28
usr.sbin/tprof/tprof.h: revision 1.5
usr.sbin/tprof/tprof.8: revision 1.29
sys/dev/tprof/tprof_armv7.c: revision 1.13
usr.sbin/tprof/tprof_top.c: revision 1.9
usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/

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