Cross Reference: /xsrc/external/mit/xf86-video-apm/dist/src/apm

Lines Matching refs:addr
7 #define check08(addr, val)						\
8     ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr08[(addr)] != (val))
9 #define check16(addr, val)						\
10     ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr16[(addr) / 2] != (val)||\
11 	((addr) == 0x50 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\
12 	((addr) == 0x52 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\
13 	((addr) == 0x54 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) ||	\
14 	((addr) == 0x56 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) ||	\
15 	((addr) == 0x58 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDIMX))
16 #define check32(addr, val)						\
17     ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr32[(addr) / 4] != (val)||\
18 	((addr) == 0x50 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\
19 	((addr) == 0x54 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) ||	\
20 	((addr) == 0x58 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDIMX) ||	\
21 	((addr) == 0x40 && (val) & DEC_START))
27 #define RDXB_M(addr)     (MMIO_IN8 (pApm->MemMap, (addr)))
28 #define RDXW_M(addr)     (MMIO_IN16(pApm->MemMap, (addr)))
29 #define RDXL_M(addr)     (MMIO_IN32(pApm->MemMap, (addr)))
30 #define WRXB_M(addr,val)  do { if (check08((addr), (val))) { \
31 			MMIO_OUT8 (pApm->MemMap, (addr), (val));	\
34 				    __FILE__, __LINE__, (addr), (val) & 255); */\
35 			curr08[MIN((addr), 0x80)] = (val); }} while (0)
36 #define WRXW_M(addr,val)  do { if (check16((addr), (val))) { \
37 			MMIO_OUT16(pApm->MemMap, (addr), (val));	\
40 				    __FILE__, __LINE__, (addr), (val)&65535); */\
41 			curr16[MIN(((addr) / 2), 0x40)] = (val); }} while (0)
42 #define WRXL_M(addr,val)  do { if (check32((addr), (val))) { \
43 			MMIO_OUT32(pApm->MemMap, (addr), (val));	\
46 				    __FILE__, __LINE__, (addr), (val)); */\
47 			curr32[MIN(((addr) / 4), 0x20)] = (val); }} while (0)
50 #define RDXB_IOP(addr)     (wrinx(pApm->xport, 0x1D, (addr) >> 2), \
51 			    inb(pApm->xbase + ((addr) & 3)))
52 #define RDXW_IOP(addr)     (wrinx(pApm->xport, 0x1D, (addr) >> 2), \
53 			    inw(pApm->xbase + ((addr) & 2)))
54 #define RDXL_IOP(addr)     (wrinx(pApm->xport, 0x1D, (addr) >> 2), \
56 #define WRXB_IOP(addr,val)					   \
58 	if (check08((addr), (val))) {				   \
59 	    wrinx(pApm->xport, 0x1D, (addr) >> 2);		   \
60 	    outb(pApm->xbase + ((addr) & 3), (val));		   \
61 	    curr08[MIN((addr), 0x80)] = (val);			   \
65 #define WRXW_IOP(addr,val)					   \
67 	if (check16((addr), (val))) {				   \
68 	    wrinx(pApm->xport, 0x1D, (addr) >> 2);		   \
69 	    outw(pApm->xbase + ((addr) & 2), (val));		   \
70 	    curr16[MIN(((addr) / 2), 0x40)] = (val);		   \
74 #define WRXL_IOP(addr,val)					   \
76 	if (check32((addr), (val))) {				   \
77 	    wrinx(pApm->xport, 0x1D, (addr) >> 2);		   \
79 	    curr32[MIN(((addr) / 4), 0x20)] = (val);		   \