1 2 3 4#define curr08 (curr - 0x30) 5#define curr16 ((CARD16 *)(curr - 0x30)) 6#define curr32 ((CARD32 *)(curr - 0x30)) 7#define check08(addr, val) \ 8 ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr08[(addr)] != (val)) 9#define check16(addr, val) \ 10 ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr16[(addr) / 2] != (val)||\ 11 ((addr) == 0x50 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\ 12 ((addr) == 0x52 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\ 13 ((addr) == 0x54 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) || \ 14 ((addr) == 0x56 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) || \ 15 ((addr) == 0x58 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDIMX)) 16#define check32(addr, val) \ 17 ((addr) >= 0x80 || (((addr)&0xF8) == 0x48) || curr32[(addr) / 4] != (val)||\ 18 ((addr) == 0x50 && curr32[0x40 / 4] & DEC_QUICKSTART_ONSOURCE)||\ 19 ((addr) == 0x54 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDEST) || \ 20 ((addr) == 0x58 && curr32[0x40 / 4] & DEC_QUICKSTART_ONDIMX) || \ 21 ((addr) == 0x40 && (val) & DEC_START)) 22 23#ifndef MIN 24#define MIN(a,b) ((a) < (b) ? (a) : (b)) 25#endif 26/* Memory mapped access to extended registers */ 27#define RDXB_M(addr) (MMIO_IN8 (pApm->MemMap, (addr))) 28#define RDXW_M(addr) (MMIO_IN16(pApm->MemMap, (addr))) 29#define RDXL_M(addr) (MMIO_IN32(pApm->MemMap, (addr))) 30#define WRXB_M(addr,val) do { if (check08((addr), (val))) { \ 31 MMIO_OUT8 (pApm->MemMap, (addr), (val)); \ 32 /*xf86DrvMsg(xf86ScreenToScrn(pApm->pScreen)->scrnIndex, X_INFO, \ 33 "File %s, line %d, %02X <- %02X\n", \ 34 __FILE__, __LINE__, (addr), (val) & 255); */\ 35 curr08[MIN((addr), 0x80)] = (val); }} while (0) 36#define WRXW_M(addr,val) do { if (check16((addr), (val))) { \ 37 MMIO_OUT16(pApm->MemMap, (addr), (val)); \ 38 /*xf86DrvMsg(xf86ScreenToScrn(pApm->pScreen)->scrnIndex, X_INFO, \ 39 "File %s, line %d, %02X <- %04X\n", \ 40 __FILE__, __LINE__, (addr), (val)&65535); */\ 41 curr16[MIN(((addr) / 2), 0x40)] = (val); }} while (0) 42#define WRXL_M(addr,val) do { if (check32((addr), (val))) { \ 43 MMIO_OUT32(pApm->MemMap, (addr), (val)); \ 44 /*xf86DrvMsg(xf86ScreenToScrn(pApm->pScreen)->scrnIndex, X_INFO, \ 45 "File %s, line %d, %02X <- %08X\n", \ 46 __FILE__, __LINE__, (addr), (val)); */\ 47 curr32[MIN(((addr) / 4), 0x20)] = (val); }} while (0) 48 49/* IO port access to extended registers */ 50#define RDXB_IOP(addr) (wrinx(pApm->xport, 0x1D, (addr) >> 2), \ 51 inb(pApm->xbase + ((addr) & 3))) 52#define RDXW_IOP(addr) (wrinx(pApm->xport, 0x1D, (addr) >> 2), \ 53 inw(pApm->xbase + ((addr) & 2))) 54#define RDXL_IOP(addr) (wrinx(pApm->xport, 0x1D, (addr) >> 2), \ 55 inl(pApm->xbase)) 56#define WRXB_IOP(addr,val) \ 57 do { \ 58 if (check08((addr), (val))) { \ 59 wrinx(pApm->xport, 0x1D, (addr) >> 2); \ 60 outb(pApm->xbase + ((addr) & 3), (val)); \ 61 curr08[MIN((addr), 0x80)] = (val); \ 62 break; \ 63 } \ 64 } while (1) 65#define WRXW_IOP(addr,val) \ 66 do { \ 67 if (check16((addr), (val))) { \ 68 wrinx(pApm->xport, 0x1D, (addr) >> 2); \ 69 outw(pApm->xbase + ((addr) & 2), (val)); \ 70 curr16[MIN(((addr) / 2), 0x40)] = (val); \ 71 break; \ 72 } \ 73 } while (1) 74#define WRXL_IOP(addr,val) \ 75 do { \ 76 if (check32((addr), (val))) { \ 77 wrinx(pApm->xport, 0x1D, (addr) >> 2); \ 78 outl(pApm->xbase, (val)); \ 79 curr32[MIN(((addr) / 4), 0x20)] = (val); \ 80 break; \ 81 } \ 82 } while (1) 83 84#define WRXL WRXL_M 85#define WRXW WRXW_M 86#define WRXB WRXB_M 87#define RDXL RDXL_M 88#define RDXW RDXW_M 89#define RDXB RDXB_M 90#define UPDATEDEST(x,y) (void)(curr32[0x54 / 4] = ((y) << 16) | ((x) & 0xFFFF)) 91 92/* Memory mapped access to VGA registers */ 93#define APMVGAB(idx) (((volatile unsigned char *)pApm->VGAMap)[idx]) 94#define APMVGAS(idx) (((volatile unsigned short *)pApm->VGAMap)[(idx) >> 1]) 95#define APMVGAW(idx) (((volatile unsigned int *)pApm->VGAMap)[(idx) >> 2]) 96#define ApmWriteCrtc(idx, val) do { APMVGAS(0x3D4) = ((val) << 8) | ((idx) & 0xFF); break; } while(1) 97#define ApmReadCrtc(idx) ((APMVGAB(0x3D4) = (idx)), APMVGAB(0x3D5)) 98#define ApmWriteGr(idx, val) do { APMVGAS(0x3CE) = ((val) << 8) | ((idx) & 0xFF); break; } while(1) 99#define ApmReadGr(idx) ((APMVGAB(0x3CE) = (idx)), APMVGAB(0x3CF)) 100#define ApmWriteSeq(idx, val) do { APMVGAB(0x3C4) = (idx); APMVGAB(0x3C5) = (val); break; } while(1) 101#define ApmReadSeq(idx) ((APMVGAB(0x3C4) = (idx)), APMVGAB(0x3C5)) 102#define ApmWriteAttr(idx, val) do { int tmp = APMVGAB(0x3DA); APMVGAB(0x3C0) = (idx); APMVGAB(0x3C0) = (val); break; } while(1) 103#define ApmReadAttr(idx) (APMVGAB(0x3DA), (APMVGAB(0x3C0) = (idx)), APMVGAB(0x3C1)) 104#define ApmWriteMiscOut(val) do { APMVGAB(0x3C2) = (val); break; } while(1) 105#define ApmReadMiscOut() APMVGAB(0x3CC) 106#define ApmWriteDacMask(val) do { APMVGAB(0x3C6) = (val); break; } while(1) 107#define ApmReadDacMask() APMVGAB(0x3C6) 108#define ApmWriteDacReadAddr(val)do { APMVGAB(0x3C7) = (val); break; } while(1) 109#define ApmWriteDacWriteAddr(val)do{ APMVGAB(0x3C8) = (val); break; } while(1) 110#define ApmWriteDacData(val) do { APMVGAB(0x3C9) = (val); break; } while(1) 111#define ApmReadDacData() APMVGAB(0x3C9) 112 113#define STATUS() (RDXL(0x1FC)) 114#define STATUS_IOP() (RDXL_IOP(0x1FC)) 115#define STATUS_FIFO (0x0F) 116#define STATUS_HOSTBLTBUSY (1 << 8) 117#define STATUS_ENGINEBUSY (1 << 10) 118#define STATUS_SDA (1 << 16) 119#define STATUS_SCL (1 << 17) 120 121#define SETFOREGROUNDCOLOR(c) WRXL(0x60,c) 122#define SETBACKGROUNDCOLOR(c) WRXL(0x64,c) 123 124#define SETSOURCEX(x) WRXW(0x50, x) 125#define SETSOURCEY(y) WRXW(0x52, y) 126#define SETSOURCEXY(x,y) WRXL(0x50, ((y) << 16) | ((x) & 0xFFFF)) 127#define SETSOURCEOFF(o) WRXL(0x50, (o)) 128 129#define SETDESTX(x) WRXW(0x54, x) 130#define SETDESTY(y) WRXW(0x56, y) 131#define SETDESTXY(x,y) WRXL(0x54, ((y) << 16) | ((x) & 0xFFFF)) 132#define SETDESTOFF(o) WRXL(0x54, (o)) 133 134#define SETWIDTH(w) WRXW(0x58, w) 135#define SETHEIGHT(h) WRXW(0x5A, h) 136#define SETWIDTHHEIGHT(w,h) WRXL(0x58, ((h) << 16) | ((w) & 0xFFFF)) 137 138#define SETOFFSET(o) WRXW(0x5C, (o)) 139#define SETSOURCEOFFSET(o) WRXW(0x5E, (o)) 140 141#define SETBYTEMASK(mask) WRXB(0x47, (mask)) 142 143#define SETPATTERN(p1, p2) do {WRXL(0x48, p1); WRXL(0x4C, p2);} while(0) 144 145#define SETDDA_AXIALSTEP(step) WRXW(0x70, (step)) 146#define SETDDA_DIAGONALSTEP(step) WRXW(0x72, (step)) 147#define SETDDA_ERRORTERM(eterm) WRXW(0x74, (eterm)) 148#define SETDDA_ADSTEP(s1,s2) WRXL(0x70, ((s2) << 16)|((s1) & 0xFFFF)) 149 150#define SETCLIP_CTRL(ctrl) WRXB(0x30, (ctrl)) 151#define SETCLIP_LEFT(x) WRXW(0x38, (x)) 152#define SETCLIP_TOP(y) WRXW(0x3A, (y)) 153#define SETCLIP_LEFTTOP(x,y) WRXL(0x38, ((y) << 16) | ((x) & 0xFFFF)) 154#define SETCLIP_RIGHT(x) WRXW(0x3C, (x)) 155#define SETCLIP_BOT(y) WRXW(0x3E, (y)) 156#define SETCLIP_RIGHTBOT(x,y) WRXL(0x3C, ((y) << 16) | ((x) & 0xFFFF)) 157 158/* RASTER OPERATION REGISTER */ 159/* P = pattern S = source D = destination */ 160#define SETROP(rop) WRXB(0x46, (rop)) 161#define ROP_P_and_S_and_D 0x80 162#define ROP_S_xor_D 0x66 163#define ROP_S 0xCC 164#define ROP_P 0xF0 165/* Then there are about 252 more operations ... */ 166 167 168/* DRAWING ENGINE CONTROL REGISTER */ 169#define SETDEC(control) WRXL(0x40, (control)) 170#define DEC_OP_VECT_NOENDP 0x0000000D 171#define DEC_OP_VECT_ENDP 0x0000000C 172#define DEC_OP_HOSTBLT_SCREEN2HOST 0x00000009 173#define DEC_OP_HOSTBLT_HOST2SCREEN 0x00000008 174#define DEC_OP_STRIP 0x00000004 175#define DEC_OP_BLT_STRETCH 0x00000003 176#define DEC_OP_RECT 0x00000002 177#define DEC_OP_BLT 0x00000001 178#define DEC_OP_NOOP 0x00000000 179#define DEC_DIR_X_NEG (1 << 6) 180#define DEC_DIR_X_POS (0 << 6) 181#define DEC_DIR_Y_NEG (1 << 7) 182#define DEC_DIR_Y_POS (0 << 7) 183#define DEC_MAJORAXIS_X (0 << 8) /* Looks like an error in the docs ...*/ 184#define DEC_MAJORAXIS_Y (1 << 8) 185#define DEC_SOURCE_LINEAR (1 << 9) 186#define DEC_SOURCE_XY (0 << 9) 187#define DEC_SOURCE_CONTIG (1 << 11) 188#define DEC_SOURCE_RECTANGULAR (0 << 11) 189#define DEC_SOURCE_MONOCHROME (1 << 12) 190#define DEC_SOURCE_COLOR (0 << 12) 191#define DEC_SOURCE_TRANSPARENCY (1 << 13) 192#define DEC_SOURCE_NO_TRANSPARENCY (0 << 13) 193#define DEC_BITDEPTH_MASK (7 << 14) 194#define DEC_BITDEPTH_24 (4 << 14) 195#define DEC_BITDEPTH_32 (3 << 14) 196#define DEC_BITDEPTH_16 (2 << 14) 197#define DEC_BITDEPTH_8 (1 << 14) 198#define DEC_DEST_LINEAR (1 << 18) 199#define DEC_DEST_XY (0 << 18) 200#define DEC_DEST_CONTIG (1 << 19) 201#define DEC_DEST_RECTANGULAR (0 << 19) 202#define DEC_DEST_TRANSPARENCY (1 << 20) 203#define DEC_DEST_NO_TRANSPARENCY (0 << 20) 204#define DEC_DEST_TRANSP_POLARITY (1 << 21) 205#define DEC_DEST_TRANSP_POLARITYINV (0 << 21) 206#define DEC_PATTERN_88_8bCOLOR (3 << 22) 207#define DEC_PATTERN_88_1bMONO (2 << 22) 208#define DEC_PATTERN_44_4bDITHER (1 << 22) 209#define DEC_PATTERN_NONE (0 << 22) 210#define DEC_WIDTH_MASK (7 << 24) 211#define DEC_WIDTH_1600 (7 << 24) 212#define DEC_WIDTH_1280 (6 << 24) 213#define DEC_WIDTH_1152 (5 << 24) 214#define DEC_WIDTH_1024 (4 << 24) 215#define DEC_WIDTH_800 (2 << 24) 216#define DEC_WIDTH_640 (1 << 24) 217#define DEC_WIDTH_LINEAR (0 << 24) 218#define DEC_DEST_UPD_LASTPIX (3 << 27) 219#define DEC_DEST_UPD_BLCORNER (2 << 27) 220#define DEC_DEST_UPD_TRCORNER (1 << 27) 221#define DEC_DEST_UPD_NONE (0 << 27) 222#define DEC_QUICKSTART_ONDEST (3 << 29) 223#define DEC_QUICKSTART_ONSOURCE (2 << 29) 224#define DEC_QUICKSTART_ONDIMX (1 << 29) 225#define DEC_QUICKSTART_NONE (0 << 29) 226#define DEC_START (1 << 31) 227#define DEC_START_NO (0 << 31) 228 229#define AT3D_SST_STATUS 0x1F4 230#define SST_BUSY 1 231