Cross Reference: /xsrc/external/mit/xf86-video-chips/dist/src/ct

Lines Matching refs:cPtr
147 #define DR(x) cPtr->Regs32[x]	/* For CT655xx naming scheme  */
148 #define MR(x) cPtr->Regs32[x]	/* CT655xx MMIO naming scheme */
149 #define BR(x) cPtr->Regs32[x]	/* For HiQV naming scheme     */
150 #define MMIOmeml(x) *(CARD32 *)(cPtr->MMIOBase + (x))
152 #define MMIOmemw(x) *(CARD16 *)(cPtr->MMIOBase + (x))
247 typedef CARD8 (*chipsReadXRPtr)(CHIPSPtr cPtr, CARD8 index);
248 typedef void (*chipsWriteXRPtr)(CHIPSPtr cPtr, CARD8 index, CARD8 value);
249 typedef CARD8 (*chipsReadFRPtr)(CHIPSPtr cPtr, CARD8 index);
250 typedef void (*chipsWriteFRPtr)(CHIPSPtr cPtr, CARD8 index, CARD8 value);
251 typedef CARD8 (*chipsReadMRPtr)(CHIPSPtr cPtr, CARD8 index);
252 typedef void (*chipsWriteMRPtr)(CHIPSPtr cPtr, CARD8 index, CARD8 value);
253 typedef CARD8 (*chipsReadMSSPtr)(CHIPSPtr cPtr);
254 typedef void (*chipsWriteMSSPtr)(CHIPSPtr cPtr, vgaHWPtr hwp, CARD8 value);
255 typedef CARD8 (*chipsReadIOSSPtr)(CHIPSPtr cPtr);
256 typedef void (*chipsWriteIOSSPtr)(CHIPSPtr cPtr, CARD8 value);
382   CHIPSPtr cPtr;
428 void CHIPSSetStdExtFuncs(CHIPSPtr cPtr);
429 void CHIPSSetMmioExtFuncs(CHIPSPtr cPtr);
448 # define BE_SWAP_APRETURE(pScrn,cPtr) \
449            ((pScrn->bitsPerPixel == 16) && cPtr->dualEndianAp)
464 	    if (cPtr->SecondCrtc == TRUE) {				      \
465 		cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) |	      \
467 		cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &      \
473 		cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) |	      \
475 		cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &      \
482 	    cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) | 	      \
484 	    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &	      \
492 	    if (cPtr->SecondCrtc == TRUE) {				      \
494 		    cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) |    \
496 		    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &  \
504 		    cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) |    \
506 		    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &  \
519 	    cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) |	      \
521 	    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &	      \
523 	    chipsHWCursorOff(cPtr, pScrn);				      \
525 				&cPtr->SavedReg, TRUE);			      \
527 	    cPtr->writeIOSS(cPtr, ((cPtr->storeIOSS & IOSS_MASK) |	      \
529 	    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), ((cPtr->storeMSS &	      \
531 	    chipsHWCursorOff(cPtr, pScrn);				      \
532 	    chipsRestore(pScrn, &cPtr->VgaSavedReg2, &cPtr->SavedReg2, TRUE); \
533 	    cPtr->writeIOSS(cPtr, cPtr->storeIOSS);			      \
534 	    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), cPtr->storeMSS);	      \
537 	    chipsHWCursorOff(cPtr, pScrn);				      \
538 	    chipsRestore(pScrn, &(VGAHWPTR(pScrn))->SavedReg, &cPtr->SavedReg,\
540 	    if (cPtr->SecondCrtc == TRUE) {				      \
544 		    cPtr->writeIOSS(cPtr, cPtr->storeIOSS);		      \
545 		    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), cPtr->storeMSS);    \
552 		    cPtr->writeIOSS(cPtr, cPtr->storeIOSS);		      \
553 		    cPtr->writeMSS(cPtr, VGAHWPTR(pScrn), cPtr->storeMSS);    \