Lines Matching defs:pVBInfo
137 PVB_DEVICE_INFO pVBInfo);
140 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
142 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
145 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
148 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
150 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
152 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
154 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo);
157 PVB_DEVICE_INFO pVBInfo);
159 PVB_DEVICE_INFO pVBInfo);
167 static void XGINew_GetXG21Sense(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo) ;
168 static UCHAR GetXG21FPBits(PVB_DEVICE_INFO pVBInfo);
169 static void XGINew_GetXG27Sense(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo) ;
170 static UCHAR GetXG27FPBits(PVB_DEVICE_INFO pVBInfo);
172 static void XGINew_DDR_MRS(PVB_DEVICE_INFO pVBInfo);
173 static void XGINew_SDR_MRS(PVB_DEVICE_INFO pVBInfo);
175 USHORT P3c4, PVB_DEVICE_INFO pVBInfo);
177 USHORT P3c4, PVB_DEVICE_INFO pVBInfo);
179 USHORT P3c4, PVB_DEVICE_INFO pVBInfo);
181 USHORT Port, PVB_DEVICE_INFO pVBInfo);
183 USHORT Port, PVB_DEVICE_INFO pVBInfo);
185 USHORT Port, PVB_DEVICE_INFO pVBInfo);
188 const USHORT XGINew_DDRDRAM_TYPE[][5], PVB_DEVICE_INFO pVBInfo);
202 PVB_DEVICE_INFO pVBInfo);
204 PVB_DEVICE_INFO pVBInfo);
205 static UCHAR XGINew_CheckFrequence(PVB_DEVICE_INFO pVBInfo);
207 PVB_DEVICE_INFO pVBInfo);
227 PVB_DEVICE_INFO pVBInfo)
248 XGINew_InitVBIOSData(HwDeviceExtension, pVBInfo);
250 pVideoMemory = ( PUCHAR )pVBInfo->ROMAddr;
255 /* if ( pVBInfo->ROMAddr == 0 ) */
258 if ( pVBInfo->FBAddr == 0 )
261 if ( pVBInfo->BaseAddr == 0 )
264 XGI_SetRegByte((XGIIOADDRESS) ( USHORT )( pVBInfo->BaseAddr + 0x12 ) , 0x67 ) ; /* 3c2 <- 67 ,ynlai */
278 ReadVBIOSTablData( HwDeviceExtension->jChipType , pVBInfo) ;
281 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x05 , 0x86 ) ;
288 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , i , 0 ) ;
291 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , i , 0 ) ;
294 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , i , 0 ) ; */
300 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , i , 0 ) ;
305 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , i , 0 ) ;
309 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x3B , 0xC0 ) ;
312 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , 0 ) ; */
315 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , 0 ) ; /* shampoo 0208 */
321 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->pCRD0[i-0xd0] ) ;
323 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->pCRDE[i-0xdE] ) ;
328 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x97, pVBInfo->CR97);
331 if (!(pVBInfo->SoftSetting & SoftDRAMType)) {
334 temp = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x97 ) ;
342 temp = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x3A ) ;
358 XGINew_RAMType = ( int )XGINew_Get340DRAMType( HwDeviceExtension , pVBInfo) ;
363 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
366 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x07, pVBInfo->SR07);
371 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x40 , *pVBInfo->pSR40 ) ;
372 XGI_SetReg( (XGIIOADDRESS)pVBInfo->P3c4 , 0x41 , *pVBInfo->pSR41 ) ;
375 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x11, 0x0F);
376 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x1F, pVBInfo->SR1F);
377 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x20, 0x20); */
378 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x20, 0xA0); /* alan, 2001/6/26 Frame buffer can read/write SR20 */
381 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x36 , 0x70 ) ; /* Hsuan, 2006/01/01 H/W request for slow corner chip */
383 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x36 , *pVBInfo->pSR36 ) ;
386 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x11 , SR11 ) ; */
395 temp1 = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x3B ) ;
409 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x09 ) ;
418 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x0D ) ;
420 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x0B ) ;
423 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x0B ) ;
431 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->AGPReg[ i - 0x47 ] ) ;
434 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->AGPReg[ 6 + i - 0x70 ] ) ;
437 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->AGPReg[ 8 + i - 0x74 ] ) ;
443 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x77 , 0xF0 ) ;
450 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x48 , 0x20 ) ; /* CR48 */
454 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x49 , pVBInfo->CR49[ 0 ] ) ;
458 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x23, pVBInfo->SR23);
459 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x24, pVBInfo->SR24);
460 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x25, pVBInfo->SR25[0]);
467 XGI_UnLockCRT2( HwDeviceExtension, pVBInfo) ;
468 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part0Port , 0x3F , 0xEF , 0x00 ) ; /* alan, disable VideoCapture */
469 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x00 , 0x00 ) ;
470 temp1 = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x7B ) ; /* chk if BCLK>=100MHz */
474 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x02,
475 pVBInfo->CRT2Data_1_2);
478 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x2E , 0x08 ) ; /* use VB */
482 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x27 , 0x1F ) ;
486 && XGINew_Get340DRAMType(HwDeviceExtension, pVBInfo) != 0) {
487 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x31, (pVBInfo->SR31 & 0x3F) | 0x40);
488 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x32, (pVBInfo->SR32 & 0xFC) | 0x01);
491 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x31, pVBInfo->SR31);
492 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x32, pVBInfo->SR32);
494 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x33, pVBInfo->SR33);
499 SetPowerConsume ( HwDeviceExtension , pVBInfo->P3c4);
505 if ( XGI_BridgeIsOn( pVBInfo ) == 1 )
508 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part2Port, 0x00, 0x1C);
509 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x0D, pVBInfo->CRT2Data_4_D);
510 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x0E, pVBInfo->CRT2Data_4_E);
511 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x10, pVBInfo->CRT2Data_4_10);
512 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x0F, 0x3F);
515 XGI_LockCRT2( HwDeviceExtension, pVBInfo ) ;
520 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x83 , 0x00 ) ;
526 XGI_SenseCRT1(pVBInfo) ;
528 if ( ( HwDeviceExtension->jChipType == XG21 ) && (pVBInfo->IF_DEF_CH7007) )
530 XGI_GetSenseStatus( HwDeviceExtension , pVBInfo ) ; /* sense CRT2 */
534 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , ~Monitor1Sense , Monitor1Sense ) ; /* Z9 default has CRT */
535 temp = GetXG21FPBits( pVBInfo ) ;
536 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x37 , ~0x01, temp ) ;
540 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , ~Monitor1Sense , Monitor1Sense ) ; /* Z9 default has CRT */
541 temp = GetXG27FPBits( pVBInfo ) ;
542 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x37 , ~0x03, temp ) ;
549 XGINew_SetDRAMDefaultRegisterXG45( HwDeviceExtension , pVBInfo->P3d4, pVBInfo ) ;
551 XGINew_SetDRAMDefaultRegister340( HwDeviceExtension , pVBInfo->P3d4, pVBInfo ) ;
560 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , pSR->jIdx , pSR->jVal ) ;
564 /* XGINew_SetDRAMModeRegister340( pVBInfo ) ; */
570 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , pVBInfo->SR15[0][XGINew_RAMType] ) ;
571 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , pVBInfo->SR15[1][XGINew_RAMType] ) ;
572 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x20 , 0x20 ) ;
576 XGINew_SetDRAMSize_XG45( HwDeviceExtension , pVBInfo) ;
578 XGINew_SetDRAMSize_340( HwDeviceExtension , pVBInfo) ;
588 temp =( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x3A ) ;
594 pVBInfo->SR21 &= 0xEF ;
596 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 , pVBInfo->SR21 ) ;
598 pVBInfo->SR22 &= 0x20;
599 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x22 , pVBInfo->SR22 ) ;
606 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x22, pVBInfo->SR22 & 0xFE);
609 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x22, pVBInfo->SR22);
612 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x21, pVBInfo->SR21);
616 if ( CheckDualChip(pVBInfo) )
617 DualChipInit( HwDeviceExtension , pVBInfo) ;
625 XGI_SenseCRT1(pVBInfo) ;
627 XGI_GetSenseStatus( HwDeviceExtension , pVBInfo ) ; /* sense CRT2 */
631 XGINew_ChkSenseStatus ( HwDeviceExtension , pVBInfo ) ;
632 XGINew_SetModeScratch ( HwDeviceExtension , pVBInfo ) ;
639 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , 0x28 ) ; //0207 temp */
640 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x36 , 0x02 ) ; //0207 temp */
653 void DualChipInit( PXGI_HW_DEVICE_INFO HwDeviceExtension ,PVB_DEVICE_INFO pVBInfo)
660 USHORT XGINew_P3C3 = pVBInfo->BaseAddr + VIDEO_SUBSYSTEM_ENABLE_PORT ;
661 USHORT XGINew_P3CC = pVBInfo->BaseAddr + MISC_OUTPUT_REG_READ_PORT ;
669 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase ;
670 pVBInfo->BaseAddr = (USHORT)HwDeviceExtension->pjIOAddress ;
673 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4 , 0xA1 , 0xBF , 0x40 ) ;
703 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA0 , 0x72 ) ;
704 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA1 , 0x81 ) ;
705 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA2 , 0x60 ) ;
706 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA3 , 0x20 ) ;
707 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA4 , 0x50 ) ;
708 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA5 , 0x40 ) ;
709 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA8 , 0x88 ) ;
710 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xA9 , 0x10 ) ;
711 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xAA , 0x80 ) ;
712 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xAB , 0x01 ) ;
713 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xAC , 0xF1 ) ;
714 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xAE , 0x80 ) ;
715 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xAF , 0x45 ) ;
716 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0xB7 , 0x24 ) ;
735 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x78 , 0x40 ) ;
736 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x79 , 0x0C ) ;
737 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x7A , 0x34 ) ;
743 tempal = (UCHAR)XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x06 ) ;
748 tempal = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , i ) ;
753 tempal = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , i ) ;
756 XGINew_SetDRAMDefaultRegister340( HwDeviceExtension , XGINew_2ndP3D4 , pVBInfo) ;
760 tempal = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , i ) ;
779 UCHAR XGINew_Get340DRAMType( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo)
785 if (pVBInfo->SoftSetting & SoftDRAMType) {
786 return (pVBInfo->SoftSetting & 0x07);
790 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x39 ) & 0x02 ;
793 data = ( XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x3A ) & 0x02 ) >> 1 ;
800 if ( pVBInfo->SoftSetting & SoftDRAMType )
802 data = pVBInfo->SoftSetting & 0x07 ;
805 temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x3B ) ;
815 XGI_SetRegAND( (XGIIOADDRESS) pVBInfo->P3d4 , 0xB4 , ~0x02 ) ; /* Independent GPIO control */
817 XGI_SetRegOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , 0x80 ) ; /* Enable GPIOH read */
818 temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x48 ) ; /* GPIOF 0:DVI 1:DVO */
828 XGI_SetRegOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0xB4 , 0x02 ) ;
833 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x97 ) & 0x01 ;
862 void XGINew_SDR_MRS(PVB_DEVICE_INFO pVBInfo)
866 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 ) ;
868 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ; /* enable mode register set(MRS) low */
871 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ; /* enable mode register set(MRS) high */
883 PVB_DEVICE_INFO pVBInfo)
894 if (pVBInfo->DRAMTypeDefinition != 0x0C) {
906 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
913 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 0 ] ) ;
914 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 1 ] ) ;
918 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
920 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 2 ] ) ;
921 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 3 ] ) ;
933 PVB_DEVICE_INFO pVBInfo)
944 if (pVBInfo->DRAMTypeDefinition != 0x0C) {
956 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
959 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 0 ] ) ;
960 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 1 ] ) ;
965 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
967 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 2 ] ) ;
968 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x16 , pVBInfo->SR16[ 3 ] ) ;
980 PVB_DEVICE_INFO pVBInfo)
999 if( P3c4 != pVBInfo->P3c4 )
1001 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x28 ) ;
1003 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x29 ) ;
1005 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x2A ) ;
1008 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x2E ) ;
1010 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x2F ) ;
1012 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x30 ) ;
1016 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1029 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
1042 void XGINew_DDRII_Bootup_XG27( PXGI_HW_DEVICE_INFO HwDeviceExtension , USHORT P3c4 , PVB_DEVICE_INFO pVBInfo)
1046 XGINew_RAMType = ( int )XGINew_GetXG20DRAMType( HwDeviceExtension , pVBInfo ) ;
1047 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1051 XGI_SetReg( (XGIIOADDRESS) P3d4 , 0x97 , pVBInfo->CR97 ) ; /* CR97 */
1119 void XGINew_DDR2_MRS_XG20( PXGI_HW_DEVICE_INFO HwDeviceExtension , USHORT P3c4 , PVB_DEVICE_INFO pVBInfo)
1124 XGINew_RAMType = ( int )XGINew_GetXG20DRAMType( HwDeviceExtension , pVBInfo ) ;
1125 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1172 void XGINew_DDR2_MRS_XG27( PXGI_HW_DEVICE_INFO HwDeviceExtension , USHORT P3c4 , PVB_DEVICE_INFO pVBInfo)
1177 XGINew_RAMType = ( int )XGINew_GetXG20DRAMType( HwDeviceExtension , pVBInfo ) ;
1178 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1252 USHORT Port, PVB_DEVICE_INFO pVBInfo)
1261 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1262 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x82 , pVBInfo->CR40[ 11 ][ XGINew_RAMType ] ) ; /* CR82 */
1263 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x85 , pVBInfo->CR40[ 12 ][ XGINew_RAMType ] ) ; /* CR85 */
1264 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x86 , pVBInfo->CR40[ 13 ][ XGINew_RAMType ] ) ; /* CR86 */
1269 XGINew_DDR1x_MRS_XG20( P3c4 , pVBInfo) ;
1273 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1279 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x82 , pVBInfo->CR40[ 11 ][ XGINew_RAMType ] ) ; /* CR82 */
1280 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x85 , pVBInfo->CR40[ 12 ][ XGINew_RAMType ] ) ; /* CR85 */
1281 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x86 , pVBInfo->CR40[ 13 ][ XGINew_RAMType ] ) ; /* CR86 */
1289 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x86 , pVBInfo->CR40[ 13 ][ XGINew_RAMType ] ) ;
1295 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x85 , pVBInfo->CR40[ 12 ][ XGINew_RAMType ] ) ; /* CR85 */
1296 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x82 , pVBInfo->CR40[ 11 ][ XGINew_RAMType ] ) ; /* CR82 */
1303 XGINew_DDR1x_MRS_340( HwDeviceExtension , P3c4 , pVBInfo ) ;
1315 USHORT Port, PVB_DEVICE_INFO pVBInfo)
1324 XGINew_SetMemoryClock( HwDeviceExtension , pVBInfo ) ;
1331 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x82 , pVBInfo->CR40[ 11 ][ XGINew_RAMType ] ) ; /* CR82 */
1332 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x85 , pVBInfo->CR40[ 12 ][ XGINew_RAMType ] ) ; /* CR85 */
1333 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x86 , pVBInfo->CR40[ 13 ][ XGINew_RAMType ] ) ; /* CR86 */
1346 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x85 , pVBInfo->CR40[ 12 ][ XGINew_RAMType ] ) ; /* CR85 */
1347 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x82 , pVBInfo->CR40[ 11 ][ XGINew_RAMType ] ) ; /* CR82 */
1360 XGINew_DDR2x_MRS_340( HwDeviceExtension , P3c4 , pVBInfo ) ;
1371 USHORT Port, PVB_DEVICE_INFO pVBInfo)
1382 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x86 , pVBInfo->CR40[ 13 ][ XGINew_RAMType ] ) ; /* CR86 */
1388 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x85 , pVBInfo->CR40[ 12 ][ XGINew_RAMType ] ) ; /* CR85 */
1389 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x82 , pVBInfo->CR40[ 11 ][ XGINew_RAMType ] ) ; /* CR82 */
1396 XGINew_DDRII_Bootup_XG27( HwDeviceExtension , P3c4 , pVBInfo) ;
1398 XGINew_DDR2_MRS_XG20( HwDeviceExtension , P3c4, pVBInfo ) ;
1400 XGINew_DDR2_MRS_340( HwDeviceExtension , P3c4, pVBInfo ) ;
1410 void XGINew_SetDRAMDefaultRegister340( PXGI_HW_DEVICE_INFO HwDeviceExtension , USHORT Port , PVB_DEVICE_INFO pVBInfo)
1418 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x6D , pVBInfo->CR40[ 8 ][ XGINew_RAMType ] ) ;
1419 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x68 , pVBInfo->CR40[ 5 ][ XGINew_RAMType ] ) ;
1420 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x69 , pVBInfo->CR40[ 6 ][ XGINew_RAMType ] ) ;
1421 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x6A , pVBInfo->CR40[ 7 ][ XGINew_RAMType ] ) ;
1426 temp = pVBInfo->CR6B[ XGINew_RAMType ][ i ] ; /* CR6B DQS fine tune delay */
1441 temp = pVBInfo->CR6E[ XGINew_RAMType ][ i ] ; /* CR6E DQM fine tune delay */
1460 temp = pVBInfo->CR6F[ XGINew_RAMType ][ 8 * k + i ] ; /* CR6F DQ fine tune delay */
1474 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x80 , pVBInfo->CR40[ 9 ][ XGINew_RAMType ] ) ; /* CR80 */
1475 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x81 , pVBInfo->CR40[ 10 ][ XGINew_RAMType ] ) ; /* CR81 */
1478 temp = pVBInfo->CR89[ XGINew_RAMType ][ 0 ] ; /* CR89 terminator type select */
1489 temp = pVBInfo->CR89[ XGINew_RAMType ][ 1 ] ;
1494 temp = pVBInfo->CR40[ 3 ][ XGINew_RAMType ] ;
1501 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x41 , pVBInfo->CR40[ 0 ][ XGINew_RAMType ] ) ; /* CR41 */
1505 XGI_SetReg( (XGIIOADDRESS) P3d4 , 0x8F , *pVBInfo->pCR8F ) ; /* CR8F */
1508 XGI_SetReg((XGIIOADDRESS) P3d4 , ( 0x90 + j ) , pVBInfo->CR40[ 14 + j ][ XGINew_RAMType ] ) ; /* CR90 - CR96 */
1511 XGI_SetReg((XGIIOADDRESS) P3d4 , ( 0xC3 + j ) , pVBInfo->CR40[ 21 + j ][ XGINew_RAMType ] ) ; /* CRC3 - CRC5 */
1514 XGI_SetReg((XGIIOADDRESS) P3d4 , ( 0x8A + j ) , pVBInfo->CR40[ 1 + j ][ XGINew_RAMType ] ) ; /* CR8A - CR8B */
1519 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x59 , pVBInfo->CR40[ 4 ][ XGINew_RAMType ] ) ; /* CR59 */
1523 XGI_SetReg((XGIIOADDRESS) P3d4, 0xCF, pVBInfo->CRCF); /* CRCF */
1539 temp = XGINew_Get340DRAMType( HwDeviceExtension, pVBInfo) ;
1541 XGINew_DDR1x_DefaultRegister( HwDeviceExtension, P3d4, pVBInfo ) ;
1543 XGINew_DDR2x_DefaultRegister( HwDeviceExtension, P3d4, pVBInfo ) ;
1545 XGINew_DDR2_DefaultRegister( HwDeviceExtension, P3d4, pVBInfo ) ;
1547 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x1B , pVBInfo->SR15[ 3 ][ XGINew_RAMType ] ) ; /* SR1B */
1556 void XGINew_SetDRAMDefaultRegisterXG45( PXGI_HW_DEVICE_INFO HwDeviceExtension , USHORT Port , PVB_DEVICE_INFO pVBInfo)
1564 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x6D , pVBInfo->CR40[ 8 ][ XGINew_RAMType ] ) ;
1565 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x6E , pVBInfo->XG45CR6E[ XGINew_RAMType ] ) ;
1566 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x6F , pVBInfo->XG45CR6F[ XGINew_RAMType ] ) ;
1567 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x68 , pVBInfo->CR40[ 5 ][ XGINew_RAMType ] ) ;
1568 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x69 , pVBInfo->CR40[ 6 ][ XGINew_RAMType ] ) ;
1569 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x6A , pVBInfo->CR40[ 7 ][ XGINew_RAMType ] ) ;
1578 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x80 , pVBInfo->CR40[ 9 ][ XGINew_RAMType ] ) ; /* CR80 */
1579 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x81 , pVBInfo->CR40[ 10 ][ XGINew_RAMType ] ) ; /* CR81 */
1582 temp = pVBInfo->CR89[ XGINew_RAMType ][ 0 ] ; /* CR89 terminator type select */
1593 temp = pVBInfo->CR89[ XGINew_RAMType ][ 1 ] ;
1642 XGI_SetReg((XGIIOADDRESS) P3d4 , ( 0x90 + j ) , pVBInfo->CR40[ 14 + j ][ XGINew_RAMType ] ) ; /* CR90 - CR96 */
1644 XGI_SetReg((XGIIOADDRESS) P3d4 , 0x59 , pVBInfo->CR40[ 4 ][ XGINew_RAMType ] ) ; /* CR59 */
1647 XGI_SetReg((XGIIOADDRESS) P3d4 , ( 0xC3 + j ) , pVBInfo->CR40[ 21 + j ][ XGINew_RAMType ] ) ; /* CRC3 - CRC5 */
1652 XGI_SetReg((XGIIOADDRESS) P3d4 , ( 0x8A + j ) , pVBInfo->CR40[ 1 + j ][ XGINew_RAMType ] ) ; /* CR8A - CR8B */
1659 XGI_SetReg((XGIIOADDRESS) P3d4, 0xCF, pVBInfo->CRCF); /* CRCF */
1664 XGINew_DDR1x_DefaultRegister( HwDeviceExtension, P3d4, pVBInfo ) ;
1667 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x1B , pVBInfo->SR15[ 3 ][ XGINew_RAMType ] ) ; /* SR1B */
1676 void XGINew_DDR_MRS(PVB_DEVICE_INFO pVBInfo)
1680 PUCHAR volatile pVideoMemory = ( PUCHAR )pVBInfo->ROMAddr ;
1686 /* data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 ) ; */
1689 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1691 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1693 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1695 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1697 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1699 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1701 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1703 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x16 , data ) ;
1708 XGI_SetReg((XGIIOADDRESS)pVBInfo->P3c4,0x16,data);
1710 if (!(pVBInfo->SR15[1][XGINew_RAMType] & 0x10))
1716 XGI_SetReg((XGIIOADDRESS)pVBInfo->P3c4,0x16,data);
1721 XGI_SetReg((XGIIOADDRESS)pVBInfo->P3c4,0x16,data);
1722 if (!(pVBInfo->SR15[1][XGINew_RAMType] & 0x10))
1728 XGI_SetReg((XGIIOADDRESS)pVBInfo->P3c4,0x16,data);
1740 void XGINew_SetDRAMSize_340( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo)
1744 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase ;
1745 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress ;
1746 XGISetModeNew(HwDeviceExtension, pVBInfo, 0x2e);
1748 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 ) ;
1749 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 , ( USHORT )( data & 0xDF ) ) ; /* disable read cache */
1752 XGI_DisplayOff(HwDeviceExtension, pVBInfo );
1753 /* data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1 ) ;
1755 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x01 , data ) ; */ /* Turn OFF Display */
1757 XGINew_DDRSizing340( HwDeviceExtension, pVBInfo ) ;
1759 data=XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 ) ;
1760 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 , ( USHORT )( data | 0x20 ) ) ; /* enable read cache */
1770 void XGINew_SetDRAMSize_XG45( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo)
1774 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase ;
1775 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress ;
1776 XGISetModeNew(HwDeviceExtension, pVBInfo, 0x2e);
1778 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 ) ;
1779 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 , ( USHORT )( data & 0xDF ) ) ; /*disable read cache*/
1781 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1 ) ;
1783 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x01 , data ) ; /*Turn OFF Display*/
1785 XGINew_DDRSizingXG45( HwDeviceExtension, pVBInfo ) ;
1787 data=XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 ) ;
1788 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x21 , ( USHORT )( data | 0x20 ) ) ; /*enable read cache*/
1800 PVB_DEVICE_INFO pVBInfo)
1804 ReadVBIOSTablData( HwDeviceExtension->jChipType , pVBInfo) ;
1807 XGINew_DDR1x_MRS_340( HwDeviceExtension, pVBInfo->P3c4, pVBInfo ) ;
1810 if ( XGINew_Get340DRAMType( HwDeviceExtension, pVBInfo) == 0 )
1812 data = ( XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x39 ) & 0x02 ) >> 1 ;
1814 XGINew_DDR2x_MRS_340( HwDeviceExtension, pVBInfo->P3c4, pVBInfo ) ;
1816 XGINew_DDR1x_MRS_340( HwDeviceExtension, pVBInfo->P3c4, pVBInfo ) ;
1819 XGINew_DDR2_MRS_340( HwDeviceExtension, pVBInfo->P3c4, pVBInfo);
1822 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1B , 0x03 ) ;
1832 void XGINew_DisableRefresh( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo)
1837 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1B ) ;
1839 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1B , data ) ;
1850 void XGINew_EnableRefresh( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo)
1853 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1B , pVBInfo->SR15[ 3 ][ XGINew_RAMType ] ) ; /* SR1B */
1867 PVB_DEVICE_INFO pVBInfo)
1871 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x15 ) ;
1891 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x15 , data ) ;
1902 PVB_DEVICE_INFO pVBInfo)
1907 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x80 , data ) ;
1919 const USHORT DRAMTYPE_TABLE[][5], PVB_DEVICE_INFO pVBInfo)
1940 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , data ) ;
1942 XGINew_SDR_MRS( pVBInfo ) ;
1958 PVB_DEVICE_INFO pVBInfo)
1978 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , data ) ;
1980 XGINew_DDR_MRS( pVBInfo ) ;
1995 PVB_DEVICE_INFO pVBInfo)
2005 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2011 /* if ( pVBInfo->FBAddr[ Position ] != Position ) */
2012 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2027 PVB_DEVICE_INFO pVBInfo)
2036 /* pVBInfo->FBAddr[ Position ] = Position ; */
2037 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2043 /* if (pVBInfo->FBAddr[ Position ] != Position ) */
2044 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2059 PVB_DEVICE_INFO pVBInfo)
2069 /* pVBInfo->FBAddr[ Position ] = Position ; */
2070 /* *( ( PULONG )( pVBInfo->FBAddr ) ) = Position ; */
2071 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2077 /* if ( pVBInfo->FBAddr[ Position ] != Position ) */
2078 /* if ( ( *( PULONG )( pVBInfo->FBAddr ) ) != Position ) */
2079 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2095 PVB_DEVICE_INFO pVBInfo)
2106 *( ( PULONG )( pVBInfo->FBAddr + Position + 0 ) ) = 0x01234567 ;
2107 *( ( PULONG )( pVBInfo->FBAddr + Position + 1 ) ) = 0x456789AB ;
2108 *( ( PULONG )( pVBInfo->FBAddr + Position + 2 ) ) = 0x55555555 ;
2109 *( ( PULONG )( pVBInfo->FBAddr + Position + 3 ) ) = 0x55555555 ;
2110 *( ( PULONG )( pVBInfo->FBAddr + Position + 4 ) ) = 0xAAAAAAAA ;
2111 *( ( PULONG )( pVBInfo->FBAddr + Position + 5 ) ) = 0xAAAAAAAA ;
2113 if ( ( *( PULONG )( pVBInfo->FBAddr + 1 ) ) == 0x456789AB )
2116 if ( ( *( PULONG )( pVBInfo->FBAddr + 0 ) ) == 0x01234567 )
2119 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 ) ;
2122 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , data ) ;
2123 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x15 ) ;
2125 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x15 , data ) ;
2138 PVB_DEVICE_INFO pVBInfo)
2144 if ( !XGINew_CheckRank( r , index , DRAMTYPE_TABLE, pVBInfo ) )
2148 if ( !XGINew_CheckBanks( index , DRAMTYPE_TABLE, pVBInfo ) )
2151 if ( !XGINew_CheckColumn( index , DRAMTYPE_TABLE, pVBInfo ) )
2166 PVB_DEVICE_INFO pVBInfo)
2172 if ( !XGINew_CheckDDRRank( r , index , DRAMTYPE_TABLE, pVBInfo ) )
2176 if ( !XGINew_CheckBanks( index , DRAMTYPE_TABLE, pVBInfo ) )
2179 if ( !XGINew_CheckColumn( index , DRAMTYPE_TABLE, pVBInfo ) )
2192 int XGINew_SDRSizing(PVB_DEVICE_INFO pVBInfo)
2199 XGINew_SetDRAMSizingType( i , XGINew_SDRDRAM_TYPE , pVBInfo) ;
2203 if ( !XGINew_SetRank( i , ( UCHAR )j , XGINew_ChannelAB , XGINew_SDRDRAM_TYPE , pVBInfo) )
2207 if ( XGINew_CheckRanks( j , i , XGINew_SDRDRAM_TYPE, pVBInfo) )
2223 PVB_DEVICE_INFO pVBInfo)
2230 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 ) ;
2253 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , ( XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 ) & 0x0F ) | ( data & 0xF0 ) ) ;
2257 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , data ) ; */
2260 /* XGINew_SetDRAMModeRegister340( pVBInfo ) ; */
2271 USHORT XGINew_SetDRAMSize20Reg( int index , USHORT DRAMTYPE_TABLE[][ 5 ], PVB_DEVICE_INFO pVBInfo)
2278 data = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x13 ) ;
2301 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , ( XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x14 ) & 0x0F ) | ( data & 0xF0 ) ) ;
2306 /* XGINew_SetReg1( pVBInfo->P3c4 , 0x14 , data ) ; */
2309 /* XGINew_SetDRAMModeRegister340( pVBInfo ) ; */
2322 PVB_DEVICE_INFO pVBInfo)
2327 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2332 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2339 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2345 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2359 PVB_DEVICE_INFO pVBInfo)
2364 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2369 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2375 *( ( PULONG )( pVBInfo->FBAddr + Position ) ) = Position ;
2382 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2388 if ( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position )
2395 if( ( *( PULONG )( pVBInfo->FBAddr + Position ) ) != Position );
2408 UCHAR XGINew_CheckFrequence(PVB_DEVICE_INFO pVBInfo)
2412 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x97 ) ;
2416 data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x39 ) ;
2432 PVB_DEVICE_INFO pVBInfo)
2440 data = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x97 ) ;
2451 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xB1 ) ; /* 22bit + 2 rank + 32bit */
2452 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x52 ) ;
2455 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2461 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x31 ) ; /* 22bit + 1 rank + 32bit */
2462 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x42 ) ;
2465 if ( XGINew_ReadWriteRest( 23 , 23 , pVBInfo ) == 1 )
2474 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xB1 ) ; /* 22bit + 2 rank + 16bit */
2475 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x41 ) ;
2478 if ( XGINew_ReadWriteRest( 23 , 22 , pVBInfo ) == 1 )
2481 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x31 ) ;
2492 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xB1 ) ;
2493 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x41 ) ;
2496 if ( XGINew_ReadWriteRest( 23 , 22 , pVBInfo ) == 1 )
2502 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x31 ) ;
2503 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x31 ) ;
2506 if ( XGINew_ReadWriteRest( 22 , 22 , pVBInfo ) == 1 )
2515 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xB1 ) ;
2516 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x30 ) ;
2519 if ( XGINew_ReadWriteRest( 22 , 21 , pVBInfo ) == 1 )
2522 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x31 ) ;
2531 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x51 ) ; /* 32Mx16 bit*/
2535 if ( XGINew_CheckFrequence(pVBInfo) == 1 )
2539 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2540 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x4C ) ;
2542 if ( XGINew_ReadWriteRest( 25 , 23 , pVBInfo ) == 1 )
2546 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x48 ) ;
2548 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2551 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x49 ) ;
2553 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2557 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2558 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x3C ) ;
2560 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2563 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x38 ) ;
2565 if ( XGINew_ReadWriteRest( 8 , 4 , pVBInfo ) == 1 )
2568 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x39 ) ;
2574 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2575 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x5A ) ;
2577 if ( XGINew_ReadWriteRest( 25 , 24 , pVBInfo ) == 1 )
2581 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x52 ) ;
2583 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2586 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x53 ) ;
2588 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2592 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2593 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x4A ) ;
2595 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2599 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x42 ) ;
2601 if ( XGINew_ReadWriteRest( 8 , 4 , pVBInfo ) == 1 )
2604 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x43 ) ;
2617 if ( XGINew_CheckFrequence(pVBInfo) == 1 ) /* DDRII, DDR2x */
2621 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2622 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x44 ) ;
2624 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2627 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2628 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x34 ) ;
2629 if ( XGINew_ReadWriteRest( 23 , 22 , pVBInfo ) == 1 )
2633 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2634 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x40 ) ;
2636 if ( XGINew_ReadWriteRest( 23 , 22 , pVBInfo ) == 1 )
2640 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2641 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x30 ) ;
2648 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2649 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x52 ) ;
2651 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2655 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2656 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x42 ) ;
2666 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2667 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x4C ) ;
2669 if ( XGI45New_ReadWriteRest( 25 , 24 , pVBInfo ) == 1 )
2673 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2674 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x58 ) ;
2676 if ( XGI45New_ReadWriteRest( 26 , 24 , pVBInfo ) == 1 )
2680 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2681 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x54 ) ;
2683 if ( XGI45New_ReadWriteRest( 25 , 24 , pVBInfo ) == 1 )
2689 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2690 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x50+i ) ;
2692 if ( XGI45New_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2697 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2698 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x58 ) ;
2700 if ( XGI45New_ReadWriteRest( 25 , 24 , pVBInfo ) == 1 )
2704 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2705 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x54 ) ;
2707 if ( XGI45New_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2713 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2714 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x50+i ) ;
2716 if ( XGI45New_ReadWriteRest( 23 , 22 , pVBInfo ) == 1 )
2723 if ( XGINew_CheckFrequence(pVBInfo) == 1 ) /* DDRII */
2727 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2728 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x4C ) ;
2730 if ( XGINew_ReadWriteRest( 25 , 23 , pVBInfo ) == 1 )
2734 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x48 ) ;
2736 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2739 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2740 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x3C ) ;
2742 if ( XGINew_ReadWriteRest( 24 , 23 , pVBInfo ) == 1 )
2747 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x38 ) ;
2754 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0xA1 ) ;
2755 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x5A ) ;
2757 if ( XGINew_ReadWriteRest( 25 , 24 , pVBInfo ) == 1 )
2761 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x13 , 0x21 ) ;
2762 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x14 , 0x4A ) ;
2776 int XGINew_DDRSizing340( PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo)
2781 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x15 , 0x00 ) ; /* noninterleaving */
2782 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1C , 0x00 ) ; /* nontiling */
2783 XGINew_CheckChannel( HwDeviceExtension, pVBInfo ) ;
2790 XGINew_SetDRAMSizingType( i , XGINew_DDRDRAM_TYPE20, pVBInfo ) ;
2791 memsize = XGINew_SetDRAMSize20Reg( i , XGINew_DDRDRAM_TYPE20, pVBInfo ) ;
2799 if ( XGINew_ReadWriteRest( addr , 5, pVBInfo ) == 1 )
2807 XGINew_SetDRAMSizingType( i , XGINew_DDRDRAM_TYPE340, pVBInfo ) ;
2808 memsize = XGINew_SetDRAMSizeReg( i , XGINew_DDRDRAM_TYPE340, pVBInfo ) ;
2816 if ( XGINew_ReadWriteRest( addr , 9, pVBInfo ) == 1 )
2830 int XGINew_DDRSizingXG45( PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo)
2835 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x15 , 0x00 ) ; /* noninterleaving */
2836 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1C , 0x00 ) ; /* nontiling */
2837 XGINew_CheckChannel( HwDeviceExtension, pVBInfo ) ;
2841 XGINew_SetDRAMSizingType( i , XGINew_DDRDRAM_TYPE340, pVBInfo ) ;
2842 memsize = XGINew_SetDRAMSizeReg( i , XGINew_DDRDRAM_TYPE340, pVBInfo ) ;
2850 if ( XGI45New_ReadWriteRest( addr , 9, pVBInfo ) == 1 )
2863 int XGINew_DDRSizing(PVB_DEVICE_INFO pVBInfo)
2870 XGINew_SetDRAMSizingType( i , XGINew_DDRDRAM_TYPE, pVBInfo ) ;
2871 XGINew_DisableChannelInterleaving( i , XGINew_DDRDRAM_TYPE , pVBInfo) ;
2874 XGINew_SetDDRChannel( i , j , XGINew_ChannelAB , XGINew_DDRDRAM_TYPE , pVBInfo ) ;
2875 if ( !XGINew_SetRank( i , ( UCHAR )j , XGINew_ChannelAB , XGINew_DDRDRAM_TYPE, pVBInfo ) )
2879 if ( XGINew_CheckDDRRanks( j , i , XGINew_DDRDRAM_TYPE, pVBInfo ) )
2893 void XGINew_SetMemoryClock( PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo)
2899 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x28 , pVBInfo->MCLKData[ XGINew_RAMType ].SR28 ) ;
2900 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x29 , pVBInfo->MCLKData[ XGINew_RAMType ].SR29 ) ;
2901 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x2A , pVBInfo->MCLKData[ XGINew_RAMType ].SR2A ) ;
2905 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x2E , pVBInfo->ECLKData[ XGINew_RAMType ].SR2E ) ;
2906 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x2F , pVBInfo->ECLKData[ XGINew_RAMType ].SR2F ) ;
2907 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x30 , pVBInfo->ECLKData[ XGINew_RAMType ].SR30 ) ;
2913 if ( ( pVBInfo->MCLKData[ XGINew_RAMType ].SR28 == 0x1C ) && ( pVBInfo->MCLKData[ XGINew_RAMType ].SR29 == 0x01 )
2914 && ( ( ( pVBInfo->ECLKData[ XGINew_RAMType ].SR2E == 0x1C ) && ( pVBInfo->ECLKData[ XGINew_RAMType ].SR2F == 0x01 ) )
2915 || ( ( pVBInfo->ECLKData[ XGINew_RAMType ].SR2E == 0x22 ) && ( pVBInfo->ECLKData[ XGINew_RAMType ].SR2F == 0x01 ) ) ) )
2917 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x32 , ( ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x32 ) & 0xFC ) | 0x02 ) ;
2959 void XGINew_InitVBIOSData(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo)
2963 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase ;
2964 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress ;
2966 /* pVBInfo->BaseAddr = ( USHORT )HwDeviceExtension->pjIOAddress ; */
2967 pVBInfo->BaseAddr = ( ULONG )HwDeviceExtension->pjIOAddress ;
2969 pVBInfo->RelIO = HwDeviceExtension->pjIOAddress - 0x30;
2970 pVBInfo->ISXPDOS = 0 ;
2972 pVBInfo->P3c4 = pVBInfo->BaseAddr + 0x14 ;
2973 pVBInfo->P3d4 = pVBInfo->BaseAddr + 0x24 ;
2974 pVBInfo->P3c0 = pVBInfo->BaseAddr + 0x10 ;
2976 pVBInfo->P3cc = pVBInfo->BaseAddr + 0x1c ; /* Jong 07/31/2009 */
2977 PDEBUG(ErrorF("XGINew_InitVBIOSData()-pVBInfo->P3cc = %d\n", pVBInfo->P3cc));
2979 pVBInfo->P3ce = pVBInfo->BaseAddr + 0x1e ;
2980 pVBInfo->P3c2 = pVBInfo->BaseAddr + 0x12 ;
2981 pVBInfo->P3ca = pVBInfo->BaseAddr + 0x1a ;
2982 pVBInfo->P3c6 = pVBInfo->BaseAddr + 0x16 ;
2983 pVBInfo->P3c7 = pVBInfo->BaseAddr + 0x17 ;
2984 pVBInfo->P3c8 = pVBInfo->BaseAddr + 0x18 ;
2985 pVBInfo->P3c9 = pVBInfo->BaseAddr + 0x19 ;
2986 pVBInfo->P3da = pVBInfo->BaseAddr + 0x2A ;
2987 pVBInfo->Part0Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_00 ;
2988 pVBInfo->Part1Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_04 ;
2989 pVBInfo->Part2Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_10 ;
2990 pVBInfo->Part3Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_12 ;
2991 pVBInfo->Part4Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_14 ;
2992 pVBInfo->Part5Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_14 + 2 ;
2994 pVBInfo->IF_DEF_LCDA = 1 ;
2995 pVBInfo->IF_DEF_VideoCapture = 0 ;
2996 pVBInfo->IF_DEF_ScaleLCD = 0 ;
2997 pVBInfo->IF_DEF_OEMUtil = 0 ;
2998 pVBInfo->IF_DEF_PWD = 0 ;
3002 pVBInfo->IF_DEF_YPbPr = 0 ;
3003 pVBInfo->IF_DEF_HiVision = 0 ;
3004 pVBInfo->IF_DEF_CRT2Monitor = 0 ;
3008 pVBInfo->IF_DEF_YPbPr = 1 ;
3009 pVBInfo->IF_DEF_HiVision = 1 ;
3010 pVBInfo->IF_DEF_CRT2Monitor = 1 ;
3014 pVBInfo->IF_DEF_YPbPr = 1 ;
3015 pVBInfo->IF_DEF_HiVision = 1 ;
3016 pVBInfo->IF_DEF_CRT2Monitor = 0 ;
3023 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part0Port, 0x3F, 0xEF, 0x00);
3026 XGI_GetVBType( pVBInfo ) ; /* Run XGI_GetVBType before InitTo330Pointer */
3027 InitTo330Pointer(HwDeviceExtension->jChipType,pVBInfo);
3037 void ReadVBIOSTablData( UCHAR ChipType , PVB_DEVICE_INFO pVBInfo)
3043 PUCHAR volatile pVideoMemory = ( PUCHAR )pVBInfo->ROMAddr ;
3064 pVBInfo->MCLKData[ jj ].SR28 = pVideoMemory[ ii ] ;
3065 pVBInfo->MCLKData[ jj ].SR29 = pVideoMemory[ ii + 1] ;
3066 pVBInfo->MCLKData[ jj ].SR2A = pVideoMemory[ ii + 2] ;
3067 pVBInfo->MCLKData[ jj ].CLOCK = pVideoMemory[ ii + 3 ] | ( pVideoMemory[ ii + 4 ] << 8 ) ;
3074 pVBInfo->ECLKData[ jj ].SR2E = pVideoMemory[ ii ] ;
3075 pVBInfo->ECLKData[ jj ].SR2F=pVideoMemory[ ii + 1 ] ;
3076 pVBInfo->ECLKData[ jj ].SR30= pVideoMemory[ ii + 2 ] ;
3077 pVBInfo->ECLKData[ jj ].CLOCK= pVideoMemory[ ii + 3 ] | ( pVideoMemory[ ii + 4 ] << 8 ) ;
3088 pVBInfo->SR15[ jj ][ 0 ] = pVideoMemory[ ii ] ; /* SR13, SR14, and SR18 */
3089 pVBInfo->SR15[ jj ][ 1 ] = pVideoMemory[ ii + 1 ] ;
3090 pVBInfo->SR15[ jj ][ 2 ] = pVideoMemory[ ii + 2 ] ;
3091 pVBInfo->SR15[ jj ][ 3 ] = pVideoMemory[ ii + 3 ] ;
3092 pVBInfo->SR15[ jj ][ 4 ] = pVideoMemory[ ii + 4 ] ;
3093 pVBInfo->SR15[ jj ][ 5 ] = pVideoMemory[ ii + 5 ] ;
3094 pVBInfo->SR15[ jj ][ 6 ] = pVideoMemory[ ii + 6 ] ;
3095 pVBInfo->SR15[ jj ][ 7 ] = pVideoMemory[ ii + 7 ] ;
3100 pVBInfo->SR15[ jj ][ 0 ] = pVideoMemory[ ii ] ; /* SR1B */
3101 pVBInfo->SR15[ jj ][ 1 ] = pVideoMemory[ ii + 1 ] ;
3102 pVBInfo->SR15[ jj ][ 2 ] = pVideoMemory[ ii + 2 ] ;
3103 pVBInfo->SR15[ jj ][ 3 ] = pVideoMemory[ ii + 3 ] ;
3104 pVBInfo->SR15[ jj ][ 4 ] = pVideoMemory[ ii + 4 ] ;
3105 pVBInfo->SR15[ jj ][ 5 ] = pVideoMemory[ ii + 5 ] ;
3106 pVBInfo->SR15[ jj ][ 6 ] = pVideoMemory[ ii + 6 ] ;
3107 pVBInfo->SR15[ jj ][ 7 ] = pVideoMemory[ ii + 7 ] ;
3109 pVBInfo->SR07 = pVideoMemory[0x74];
3110 pVBInfo->SR1F = pVideoMemory[0x75];
3111 pVBInfo->SR21 = pVideoMemory[0x76];
3112 pVBInfo->SR22 = pVideoMemory[0x77];
3113 pVBInfo->SR23 = pVideoMemory[0x78];
3114 pVBInfo->SR24 = pVideoMemory[0x79];
3115 pVBInfo->SR25[0] = pVideoMemory[0x7A];
3116 pVBInfo->SR31 = pVideoMemory[0x7B];
3117 pVBInfo->SR32 = pVideoMemory[0x7C];
3118 pVBInfo->SR33 = pVideoMemory[0x7D];
3123 pVBInfo->CR40[ jj ][ 0 ] = pVideoMemory[ ii ] ;
3124 pVBInfo->CR40[ jj ][ 1 ] = pVideoMemory[ ii + 1 ] ;
3125 pVBInfo->CR40[ jj ][ 2 ] = pVideoMemory[ ii + 2 ] ;
3126 pVBInfo->CR40[ jj ][ 3 ] = pVideoMemory[ ii + 3 ] ;
3127 pVBInfo->CR40[ jj ][ 4 ] = pVideoMemory[ ii + 4 ] ;
3128 pVBInfo->CR40[ jj ][ 5 ] = pVideoMemory[ ii + 5 ] ;
3129 pVBInfo->CR40[ jj ][ 6 ] = pVideoMemory[ ii + 6 ] ;
3130 pVBInfo->CR40[ jj ][ 7 ] = pVideoMemory[ ii + 7 ] ;
3137 pVBInfo->CR40[ j ][ 0 ] = pVideoMemory[ ii ] ;
3138 pVBInfo->CR40[ j ][ 1 ] = pVideoMemory[ ii + 1 ] ;
3139 pVBInfo->CR40[ j ][ 2 ] = pVideoMemory[ ii + 2 ] ;
3140 pVBInfo->CR40[ j ][ 3 ] = pVideoMemory[ ii + 3 ] ;
3141 pVBInfo->CR40[ j ][ 4 ] = pVideoMemory[ ii + 4 ] ;
3142 pVBInfo->CR40[ j ][ 5 ] = pVideoMemory[ ii + 5 ] ;
3143 pVBInfo->CR40[ j ][ 6 ] = pVideoMemory[ ii + 6 ] ;
3144 pVBInfo->CR40[ j ][ 7 ] = pVideoMemory[ ii + 7 ] ;
3153 pVBInfo->CR6B[ j ][ k ] = pVideoMemory[ i + 4 * j + k ] ;
3162 pVBInfo->XG45CR6E[ j ] = pVideoMemory[i] ;
3170 pVBInfo->CR6E[ j ][ k ] = pVideoMemory[ i + 4 * j + k ] ;
3179 pVBInfo->XG45CR6F[ j ] = pVideoMemory[i] ;
3187 pVBInfo->CR6F[ j ][ k ] = pVideoMemory[ i + 32 * j + k ] ;
3196 pVBInfo->CR89[ j ][ k ] = pVideoMemory[ i + 2 * j + k ] ;
3201 pVBInfo->AGPReg[ j ] = pVideoMemory[ i + j ] ;
3205 pVBInfo->SR16[ j ] = pVideoMemory[ i + j ] ;
3209 pVBInfo->CRCF = pVideoMemory[0x1CA];
3210 pVBInfo->DRAMTypeDefinition = pVideoMemory[0x1CB];
3211 pVBInfo->I2CDefinition = pVideoMemory[0x1D1];
3213 pVBInfo->CR97 = pVideoMemory[0x1D2]; */
3218 *pVBInfo->pDVOSetting = pVideoMemory[ 0x67 ];
3222 *pVBInfo->pCR2E = pVideoMemory[ i + 4 ] ;
3223 *pVBInfo->pCR2F = pVideoMemory[ i + 5 ] ;
3224 *pVBInfo->pCR46 = pVideoMemory[ i + 6 ] ;
3225 *pVBInfo->pCR47 = pVideoMemory[ i + 7 ] ;
3233 pVBInfo->pCRD0[i] = pVideoMemory[ jj ] ;
3235 pVBInfo->pCRDE[i] = pVideoMemory[ jj ] ;
3237 *pVBInfo->pSR40 = pVideoMemory[ jj ] ;
3239 *pVBInfo->pSR41 = pVideoMemory[ jj ] ;
3243 *pVBInfo->pDVOSetting = pVideoMemory[ 0x67 ];
3248 *pVBInfo->pCR2E = pVideoMemory[ jj ] ;
3249 *pVBInfo->pCR2F = pVideoMemory[ jj + 1 ] ;
3250 *pVBInfo->pCR46 = pVideoMemory[ jj + 2 ] ;
3251 *pVBInfo->pCR47 = pVideoMemory[ jj + 3 ] ;
3256 pVBInfo->CRCF = pVideoMemory[ 0x1CA ] ;
3257 pVBInfo->DRAMTypeDefinition = pVideoMemory[ 0x1CB ] ;
3258 pVBInfo->I2CDefinition = pVideoMemory[ 0x1D1 ] ;
3261 pVBInfo->CR97 = pVideoMemory[ 0x1D2 ] ;
3264 *pVBInfo->pSR36 = pVideoMemory[ 0x1D3 ] ;
3265 *pVBInfo->pCR8F = pVideoMemory[ 0x1D5 ] ;
3273 pVBInfo->IF_DEF_LVDS = 0 ;
3276 pVBInfo->IF_DEF_LVDS = 1 ;
3284 pVBInfo->XG21_LVDSCapList[k].LVDS_Capability = pVideoMemory[ i ] | ( pVideoMemory[ i + 1 ] << 8 );
3285 pVBInfo->XG21_LVDSCapList[k].LVDSHT = pVideoMemory[ i + 2 ] | ( pVideoMemory[ i + 3 ] << 8 ) ;
3286 pVBInfo->XG21_LVDSCapList[k].LVDSVT = pVideoMemory[ i + 4 ] | ( pVideoMemory[ i + 5 ] << 8 );
3287 pVBInfo->XG21_LVDSCapList[k].LVDSHDE = pVideoMemory[ i + 6 ] | ( pVideoMemory[ i + 7 ] << 8 );
3288 pVBInfo->XG21_LVDSCapList[k].LVDSVDE = pVideoMemory[ i + 8 ] | ( pVideoMemory[ i + 9 ] << 8 );
3289 pVBInfo->XG21_LVDSCapList[k].LVDSHFP = pVideoMemory[ i + 10 ] | ( pVideoMemory[ i + 11 ] << 8 );
3290 pVBInfo->XG21_LVDSCapList[k].LVDSVFP = pVideoMemory[ i + 12 ] | ( pVideoMemory[ i + 13 ] << 8 );
3291 pVBInfo->XG21_LVDSCapList[k].LVDSHSYNC = pVideoMemory[ i + 14 ] | ( pVideoMemory[ i + 15 ] << 8 );
3292 pVBInfo->XG21_LVDSCapList[k].LVDSVSYNC = pVideoMemory[ i + 16 ] | ( pVideoMemory[ i + 17 ] << 8 );
3293 pVBInfo->XG21_LVDSCapList[k].VCLKData1 = pVideoMemory[ i + 18 ] ;
3294 pVBInfo->XG21_LVDSCapList[k].VCLKData2 = pVideoMemory[ i + 19 ] ;
3295 pVBInfo->XG21_LVDSCapList[k].PSC_S1 = pVideoMemory[ i + 20 ] ;
3296 pVBInfo->XG21_LVDSCapList[k].PSC_S2 = pVideoMemory[ i + 21 ] ;
3297 pVBInfo->XG21_LVDSCapList[k].PSC_S3 = pVideoMemory[ i + 22 ] ;
3298 pVBInfo->XG21_LVDSCapList[k].PSC_S4 = pVideoMemory[ i + 23 ] ;
3299 pVBInfo->XG21_LVDSCapList[k].PSC_S5 = pVideoMemory[ i + 24 ] ;
3307 pVBInfo->XG21_LVDSCapList[0].LVDS_Capability = pVideoMemory[ i ] | ( pVideoMemory[ i + 1 ] << 8 );
3308 pVBInfo->XG21_LVDSCapList[0].LVDSHT = pVideoMemory[ i + 2 ] | ( pVideoMemory[ i + 3 ] << 8 ) ;
3309 pVBInfo->XG21_LVDSCapList[0].LVDSVT = pVideoMemory[ i + 4 ] | ( pVideoMemory[ i + 5 ] << 8 );
3310 pVBInfo->XG21_LVDSCapList[0].LVDSHDE = pVideoMemory[ i + 6 ] | ( pVideoMemory[ i + 7 ] << 8 );
3311 pVBInfo->XG21_LVDSCapList[0].LVDSVDE = pVideoMemory[ i + 8 ] | ( pVideoMemory[ i + 9 ] << 8 );
3312 pVBInfo->XG21_LVDSCapList[0].LVDSHFP = pVideoMemory[ i + 10 ] | ( pVideoMemory[ i + 11 ] << 8 );
3313 pVBInfo->XG21_LVDSCapList[0].LVDSVFP = pVideoMemory[ i + 12 ] | ( pVideoMemory[ i + 13 ] << 8 );
3314 pVBInfo->XG21_LVDSCapList[0].LVDSHSYNC = pVideoMemory[ i + 14 ] | ( pVideoMemory[ i + 15 ] << 8 );
3315 pVBInfo->XG21_LVDSCapList[0].LVDSVSYNC = pVideoMemory[ i + 16 ] | ( pVideoMemory[ i + 17 ] << 8 );
3316 pVBInfo->XG21_LVDSCapList[0].VCLKData1 = pVideoMemory[ i + 18 ] ;
3317 pVBInfo->XG21_LVDSCapList[0].VCLKData2 = pVideoMemory[ i + 19 ] ;
3318 pVBInfo->XG21_LVDSCapList[0].PSC_S1 = pVideoMemory[ i + 20 ] ;
3319 pVBInfo->XG21_LVDSCapList[0].PSC_S2 = pVideoMemory[ i + 21 ] ;
3320 pVBInfo->XG21_LVDSCapList[0].PSC_S3 = pVideoMemory[ i + 22 ] ;
3321 pVBInfo->XG21_LVDSCapList[0].PSC_S4 = pVideoMemory[ i + 23 ] ;
3322 pVBInfo->XG21_LVDSCapList[0].PSC_S5 = pVideoMemory[ i + 24 ] ;
3325 pVBInfo->IF_DEF_CH7007 = 0 ;
3329 pVBInfo->IF_DEF_CH7007 = 1 ; /* [Billy] 07/05/03 */
3344 pVBInfo->XG21_LVDSCapList[k].LVDS_Capability = pVideoMemory[ i ] | ( pVideoMemory[ i + 1 ] << 8 );
3345 pVBInfo->XG21_LVDSCapList[k].LVDSHT = pVideoMemory[ i + 2 ] | ( pVideoMemory[ i + 3 ] << 8 ) ;
3346 pVBInfo->XG21_LVDSCapList[k].LVDSVT = pVideoMemory[ i + 4 ] | ( pVideoMemory[ i + 5 ] << 8 );
3347 pVBInfo->XG21_LVDSCapList[k].LVDSHDE = pVideoMemory[ i + 6 ] | ( pVideoMemory[ i + 7 ] << 8 );
3348 pVBInfo->XG21_LVDSCapList[k].LVDSVDE = pVideoMemory[ i + 8 ] | ( pVideoMemory[ i + 9 ] << 8 );
3349 pVBInfo->XG21_LVDSCapList[k].LVDSHFP = pVideoMemory[ i + 10 ] | ( pVideoMemory[ i + 11 ] << 8 );
3350 pVBInfo->XG21_LVDSCapList[k].LVDSVFP = pVideoMemory[ i + 12 ] | ( pVideoMemory[ i + 13 ] << 8 );
3351 pVBInfo->XG21_LVDSCapList[k].LVDSHSYNC = pVideoMemory[ i + 14 ] | ( pVideoMemory[ i + 15 ] << 8 );
3352 pVBInfo->XG21_LVDSCapList[k].LVDSVSYNC = pVideoMemory[ i + 16 ] | ( pVideoMemory[ i + 17 ] << 8 );
3353 pVBInfo->XG21_LVDSCapList[k].VCLKData1 = pVideoMemory[ i + 18 ] ;
3354 pVBInfo->XG21_LVDSCapList[k].VCLKData2 = pVideoMemory[ i + 19 ] ;
3355 pVBInfo->XG21_LVDSCapList[k].PSC_S1 = pVideoMemory[ i + 20 ] ;
3356 pVBInfo->XG21_LVDSCapList[k].PSC_S2 = pVideoMemory[ i + 21 ] ;
3357 pVBInfo->XG21_LVDSCapList[k].PSC_S3 = pVideoMemory[ i + 22 ] ;
3358 pVBInfo->XG21_LVDSCapList[k].PSC_S4 = pVideoMemory[ i + 23 ] ;
3359 pVBInfo->XG21_LVDSCapList[k].PSC_S5 = pVideoMemory[ i + 24 ] ;
3367 pVBInfo->XG21_LVDSCapList[0].LVDS_Capability = pVideoMemory[ i ] | ( pVideoMemory[ i + 1 ] << 8 );
3368 pVBInfo->XG21_LVDSCapList[0].LVDSHT = pVideoMemory[ i + 2 ] | ( pVideoMemory[ i + 3 ] << 8 ) ;
3369 pVBInfo->XG21_LVDSCapList[0].LVDSVT = pVideoMemory[ i + 4 ] | ( pVideoMemory[ i + 5 ] << 8 );
3370 pVBInfo->XG21_LVDSCapList[0].LVDSHDE = pVideoMemory[ i + 6 ] | ( pVideoMemory[ i + 7 ] << 8 );
3371 pVBInfo->XG21_LVDSCapList[0].LVDSVDE = pVideoMemory[ i + 8 ] | ( pVideoMemory[ i + 9 ] << 8 );
3372 pVBInfo->XG21_LVDSCapList[0].LVDSHFP = pVideoMemory[ i + 10 ] | ( pVideoMemory[ i + 11 ] << 8 );
3373 pVBInfo->XG21_LVDSCapList[0].LVDSVFP = pVideoMemory[ i + 12 ] | ( pVideoMemory[ i + 13 ] << 8 );
3374 pVBInfo->XG21_LVDSCapList[0].LVDSHSYNC = pVideoMemory[ i + 14 ] | ( pVideoMemory[ i + 15 ] << 8 );
3375 pVBInfo->XG21_LVDSCapList[0].LVDSVSYNC = pVideoMemory[ i + 16 ] | ( pVideoMemory[ i + 17 ] << 8 );
3376 pVBInfo->XG21_LVDSCapList[0].VCLKData1 = pVideoMemory[ i + 18 ] ;
3377 pVBInfo->XG21_LVDSCapList[0].VCLKData2 = pVideoMemory[ i + 19 ] ;
3378 pVBInfo->XG21_LVDSCapList[0].PSC_S1 = pVideoMemory[ i + 20 ] ;
3379 pVBInfo->XG21_LVDSCapList[0].PSC_S2 = pVideoMemory[ i + 21 ] ;
3380 pVBInfo->XG21_LVDSCapList[0].PSC_S3 = pVideoMemory[ i + 22 ] ;
3381 pVBInfo->XG21_LVDSCapList[0].PSC_S4 = pVideoMemory[ i + 23 ] ;
3382 pVBInfo->XG21_LVDSCapList[0].PSC_S5 = pVideoMemory[ i + 24 ] ;
3396 void XGINew_DDR1x_MRS_XG20( USHORT P3c4 , PVB_DEVICE_INFO pVBInfo)
3410 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
3419 XGI_SetReg((XGIIOADDRESS) P3c4 , 0x18 , pVBInfo->SR15[ 2 ][ XGINew_RAMType ] ) ; /* SR18 */
3433 PVB_DEVICE_INFO pVBInfo)
3439 ReadVBIOSTablData( HwDeviceExtension->jChipType , pVBInfo) ;
3441 if ( XGINew_Get340DRAMType( HwDeviceExtension, pVBInfo) == 0 )
3442 XGINew_DDR1x_MRS_XG20( pVBInfo->P3c4, pVBInfo ) ;
3444 XGINew_DDR2x_MRS_340( HwDeviceExtension, pVBInfo->P3c4, pVBInfo ) ;
3446 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1B , 0x03 ) ;
3455 PVB_DEVICE_INFO pVBInfo = &VBINF;
3456 pVBInfo->ROMAddr = HwDeviceExtension->pjVirtualRomBase ;
3457 pVBInfo->FBAddr = HwDeviceExtension->pjVideoMemoryAddress ;
3458 pVBInfo->BaseAddr = ( USHORT )HwDeviceExtension->pjIOAddress ;
3459 pVBInfo->ISXPDOS = 0 ;
3461 pVBInfo->P3c4 = pVBInfo->BaseAddr + 0x14 ;
3462 pVBInfo->P3d4 = pVBInfo->BaseAddr + 0x24 ;
3463 pVBInfo->P3c0 = pVBInfo->BaseAddr + 0x10 ;
3464 pVBInfo->P3ce = pVBInfo->BaseAddr + 0x1e ;
3465 pVBInfo->P3c2 = pVBInfo->BaseAddr + 0x12 ;
3466 pVBInfo->P3ca = pVBInfo->BaseAddr + 0x1a ;
3467 pVBInfo->P3c6 = pVBInfo->BaseAddr + 0x16 ;
3468 pVBInfo->P3c7 = pVBInfo->BaseAddr + 0x17 ;
3469 pVBInfo->P3c8 = pVBInfo->BaseAddr + 0x18 ;
3470 pVBInfo->P3c9 = pVBInfo->BaseAddr + 0x19 ;
3472 pVBInfo->P3cc = pVBInfo->BaseAddr + 0x1c ; /* Jong 07/31/2009 */
3473 PDEBUG(ErrorF("XGINew_SetDRAMModeRegister_XG27()-pVBInfo->P3cc = %d\n", pVBInfo->P3cc));
3475 pVBInfo->P3da = pVBInfo->BaseAddr + 0x2A ;
3476 pVBInfo->Part0Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_00 ;
3477 pVBInfo->Part1Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_04 ;
3478 pVBInfo->Part2Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_10 ;
3479 pVBInfo->Part3Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_12 ;
3480 pVBInfo->Part4Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_14 ;
3481 pVBInfo->Part5Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_14 + 2 ;
3483 InitTo330Pointer(HwDeviceExtension->jChipType,pVBInfo);
3485 ReadVBIOSTablData( HwDeviceExtension->jChipType , pVBInfo) ;
3487 if ( XGINew_GetXG20DRAMType( HwDeviceExtension, pVBInfo) == 0 )
3488 XGINew_DDR1x_MRS_XG20( pVBInfo->P3c4, pVBInfo ) ;
3490 /*XGINew_DDR2_MRS_XG27( HwDeviceExtension , pVBInfo->P3c4 , pVBInfo ) ;*/
3491 XGINew_DDRII_Bootup_XG27( HwDeviceExtension , pVBInfo->P3c4 , pVBInfo) ;
3493 /*XGINew_SetReg1( pVBInfo->P3c4 , 0x1B , 0x03 ) ;*/
3494 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3c4 , 0x1B , pVBInfo->SR15[ 3 ][ XGINew_RAMType ] ) ; /* SR1B */
3504 void XGINew_ChkSenseStatus ( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo)
3508 temp = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x32 ) ;
3531 tempcx = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x3d ) ;
3532 tempcx |= ( XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x3e ) << 8 ) ;
3536 CR3CData = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x3c ) ;
3540 if (pVBInfo->SoftSetting & ModeSoftSetting) {
3548 if (pVBInfo->SoftSetting & ModeSoftSetting) {
3554 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x3d , ( tempbx & 0x00FF ) ) ;
3555 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x3e , ( ( tempbx & 0xFF00 ) >> 8 )) ;
3563 void XGINew_SetModeScratch ( PXGI_HW_DEVICE_INFO HwDeviceExtension , PVB_DEVICE_INFO pVBInfo )
3567 temp = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x3d ) ;
3568 temp |= XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x3e ) << 8 ;
3569 temp |= ( XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x31 ) & ( DriverMode >> 8) ) << 8 ;
3571 if ( pVBInfo->IF_DEF_CRT2Monitor == 1)
3594 if ( pVBInfo->IF_DEF_HiVision == 1 )
3600 if ( pVBInfo->IF_DEF_YPbPr == 1 )
3617 if ( pVBInfo->IF_DEF_HiVision == 1 )
3623 if ( pVBInfo->IF_DEF_YPbPr == 1 )
3635 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x30 , tempcl ) ;
3637 CR31Data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x31 ) ;
3644 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x31 , CR31Data ) ;
3646 CR38Data = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x38 ) ;
3649 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x38 , CR38Data ) ;
3659 void XGINew_GetXG21Sense(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo)
3662 PUCHAR volatile pVideoMemory = ( PUCHAR )pVBInfo->ROMAddr ;
3664 pVBInfo->IF_DEF_LVDS = 0 ;
3668 pVBInfo->IF_DEF_LVDS = 1 ;
3669 XGI_SetRegOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , LCDSense ) ;
3670 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 , ~0xE0 , 0xC0 ) ; /* LVDS on chip */
3674 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , ~0x03 , 0x03 ) ; /* Enable GPIOA/B read */
3675 Temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x48 ) & 0xC0;
3678 XGINew_SenseLCD( HwDeviceExtension, pVBInfo ) ;
3679 XGI_SetRegOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , LCDSense ) ;
3680 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , ~0x20 , 0x20 ) ; /* Enable read GPIOF */
3681 Temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x48 ) & 0x04 ;
3683 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 , ~0xE0 , 0x80 ) ; /* TMDS on chip */
3685 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 , ~0xE0 , 0xA0 ) ; /* Only DVO on chip */
3687 XGI_SetRegAND( (XGIIOADDRESS)pVBInfo->P3d4 , 0x4A , ~0x20 ) ; /* Disable read GPIOF */
3698 void XGINew_GetXG27Sense(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo)
3701 PUCHAR volatile pVideoMemory = ( PUCHAR )pVBInfo->ROMAddr ;
3703 pVBInfo->IF_DEF_LVDS = 0 ;
3704 bCR4A = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A ) ;
3705 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , ~0x07 , 0x07 ) ; /* Enable GPIOA/B/C read */
3706 Temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x48 ) & 0x07;
3707 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4, 0x4A , bCR4A ) ;
3711 pVBInfo->IF_DEF_LVDS = 1 ;
3712 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 , ~0xE0 , 0xC0 ) ; /* LVDS setting */
3713 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4, 0x30 , 0x21 ) ;
3717 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 , ~0xE0 , 0xA0 ) ; /* TMDS/DVO setting */
3720 XGI_SetRegOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , LCDSense ) ;
3723 UCHAR GetXG21FPBits(PVB_DEVICE_INFO pVBInfo)
3727 CR4A = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A ) ;
3728 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , ~0x10 , 0x10 ) ; /* enable GPIOE read */
3729 CR38 = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 ) ;
3733 temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x48 ) ;
3738 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4, 0x4A , CR4A ) ;
3743 UCHAR GetXG27FPBits(PVB_DEVICE_INFO pVBInfo)
3747 CR4A = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A ) ;
3748 XGI_SetRegANDOR( (XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , ~0x03 , 0x03 ) ; /* enable GPIOA/B/C read */
3749 temp = XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x48 ) ;
3759 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4, 0x4A , CR4A ) ;