| /src/external/gpl3/gdb/dist/sim/ppc/ |
| bits.h | 96 #define BIT5(POS) (1 << _MAKE_SHIFT(5, POS))
|
| /src/external/gpl3/gdb.old/dist/sim/ppc/ |
| bits.h | 96 #define BIT5(POS) (1 << _MAKE_SHIFT(5, POS))
|
| /src/external/gpl3/gdb/dist/sim/common/ |
| sim-bits.h | 252 #define BIT5(POS) (1 << _LSB_SHIFT (5, (POS)))
|
| /src/external/gpl3/gdb.old/dist/sim/common/ |
| sim-bits.h | 252 #define BIT5(POS) (1 << _LSB_SHIFT (5, (POS)))
|
| /src/external/bsd/zstd/dist/lib/common/ |
| zstd_internal.h | 77 #define BIT5 32
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| sparc-opc.c | 1935 #define BIT5 (1<<5)
1936 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0, 0, 0, sparclet },
1937 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0, 0, 0, sparclet },
1938 { "cpush", F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1940 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1942 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, 0, 0, sparclet },
1943 #undef BIT5
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| sparc-opc.c | 1935 #define BIT5 (1<<5)
1936 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0, 0, 0, sparclet },
1937 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0, 0, 0, sparclet },
1938 { "cpush", F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1940 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1942 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, 0, 0, sparclet },
1943 #undef BIT5
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| sparc-opc.c | 1935 #define BIT5 (1<<5)
1936 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0, 0, 0, sparclet },
1937 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0, 0, 0, sparclet },
1938 { "cpush", F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1940 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1942 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, 0, 0, sparclet },
1943 #undef BIT5
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| sparc-opc.c | 1935 #define BIT5 (1<<5)
1936 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0, 0, 0, sparclet },
1937 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0, 0, 0, sparclet },
1938 { "cpush", F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1940 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0, 0, 0, sparclet },
1942 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, 0, 0, sparclet },
1943 #undef BIT5
|
| /src/external/bsd/zstd/dist/lib/legacy/ |
| zstd_v01.c | 1277 #define BIT5 32
|
| zstd_v03.c | 2282 #define BIT5 32
|
| zstd_v02.c | 2642 #define BIT5 32
|
| zstd_v04.c | 301 #define BIT5 32
|
| zstd_v06.c | 411 #define BIT5 32
|
| zstd_v07.c | 2649 #define BIT5 32
|
| /src/sys/dev/pci/ |
| unichromereg.h | 57 #define BIT5 0x20
|
