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    Searched defs:HREAD4 (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/arch/arm/xscale/
pxa2x0_ohci.c 53 #define HREAD4(sc,r) bus_space_read_4((sc)->sc.iot, (sc)->sc.ioh, (r))
246 hr = HREAD4(sc, USBHC_HR);
251 hr = HREAD4(sc, USBHC_HR);
255 hr = HREAD4(sc, USBHC_HR);
258 while (HREAD4(sc, USBHC_HR) & USBHC_HR_FSBIR)
262 hr = HREAD4(sc, USBHC_HR);
264 hr = HREAD4(sc, USBHC_HR);
269 hr = HREAD4(sc, USBHC_UHCRHDA);
278 hr = HREAD4(sc, USBHC_HR);
283 hr = HREAD4(sc, USBHC_HR)
    [all...]
  /src/sys/dev/acpi/
qcomipcc.c 37 #define HREAD4(sc, reg) \
157 while ((reg = HREAD4(sc, IPCC_RECV_ID)) != ~0) {
qcomiic.c 48 #define HREAD4(sc, reg) \
144 stat = HREAD4(sc, GENI_M_IRQ_STATUS);
165 stat = HREAD4(sc, GENI_RX_FIFO_STATUS);
172 word = HREAD4(sc, GENI_RX_FIFO);
191 stat = HREAD4(sc, GENI_TX_FIFO_STATUS);
221 stat = HREAD4(sc, GENI_M_IRQ_STATUS);
243 stat = HREAD4(sc, GENI_M_IRQ_STATUS);
257 stat = HREAD4(sc, GENI_M_IRQ_STATUS);
qcomspmi.c 102 #define HREAD4(sc, obj, reg) \
217 val = HREAD4(sc, QCSPMI_REG_CORE, SPMI_VERSION);
244 val = HREAD4(sc, QCSPMI_REG_CORE, SPMI_ARB_APID_MAP(sc, i));
250 val = HREAD4(sc, QCSPMI_REG_CNFG, SPMI_OWNERSHIP_TABLE(sc, i));
300 reg = HREAD4(sc, QCSPMI_REG_OBSRVR,
323 reg = HREAD4(sc, QCSPMI_REG_OBSRVR,
330 reg = HREAD4(sc, QCSPMI_REG_OBSRVR,
385 reg = HREAD4(sc, QCSPMI_REG_CHNLS, SPMI_CHAN_OFF(sc, apid) +
  /src/sys/arch/arm/rockchip/
rk_tcphy.c 99 #define HREAD4(sc, reg) \
104 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
106 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
312 reg = HREAD4(sc, CMN_DIAG_HSCLK_SEL);
359 reg = HREAD4(sc, PMA_CMN_CTRL1);
rk3399_pcie.c 119 #define HREAD4(sc, reg) \
344 status = HREAD4(sc, PCIE_CLIENT_BASIC_STATUS1);
361 HWRITE4(sc, PCIE_RC_CONFIG_LCSR, HREAD4(sc, PCIE_RC_CONFIG_LCSR) | PCIE_LCSR_RETRAIN);
363 status = HREAD4(sc, PCIE_LM_CORE_CTRL);
392 status = HREAD4(sc, PCIE_RC_CONFIG_THP_CAP);
397 status = HREAD4(sc, PCIE_RC_PCIE_LCAP);
587 val = HREAD4(sc, PCIE_RC_NORMAL_BASE + reg);
  /src/sys/dev/sdmmc/
sdhc.c 128 #define HREAD4(hp, reg) \
178 do if ((bits) != 0) HWRITE4((hp), (reg), HREAD4((hp), (reg)) & ~(bits)); while (0)
184 do if ((bits) != 0) HWRITE4((hp), (reg), HREAD4((hp), (reg)) | (bits)); while (0)
308 sdhcver = HREAD4(hp, SDHC_ESDHC_HOST_CTL_VERSION);
378 caps = HREAD4(hp, SDHC_CAPABILITIES);
386 caps = sc->sc_caps = HREAD4(hp, SDHC_CAPABILITIES);
388 caps2 = sc->sc_caps2 = HREAD4(hp, SDHC_CAPABILITIES2);
726 uint32_t v = HREAD4(hp, i);
897 r = ISSET(HREAD4(hp, SDHC_PRESENT_STATE), SDHC_CARD_INSERTED);
914 r = ISSET(HREAD4(hp, SDHC_PRESENT_STATE), SDHC_WRITE_PROTECT_SWITCH)
    [all...]

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