Home | History | Annotate | Line # | Download | only in pinctrl
      1 /*	$NetBSD: pads-imx8qm.h,v 1.1.1.1 2019/05/25 11:29:13 jmcneill Exp $	*/
      2 
      3 /* SPDX-License-Identifier: GPL-2.0+ */
      4 /*
      5  * Copyright (C) 2016 Freescale Semiconductor, Inc.
      6  * Copyright 2017~2018 NXP
      7  */
      8 
      9 #ifndef _IMX8QM_PADS_H
     10 #define _IMX8QM_PADS_H
     11 
     12 /* pin id */
     13 #define IMX8QM_SIM0_CLK					0
     14 #define IMX8QM_SIM0_RST					1
     15 #define IMX8QM_SIM0_IO					2
     16 #define IMX8QM_SIM0_PD					3
     17 #define IMX8QM_SIM0_POWER_EN				4
     18 #define IMX8QM_SIM0_GPIO0_00				5
     19 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM		6
     20 #define IMX8QM_M40_I2C0_SCL				7
     21 #define IMX8QM_M40_I2C0_SDA				8
     22 #define IMX8QM_M40_GPIO0_00				9
     23 #define IMX8QM_M40_GPIO0_01				10
     24 #define IMX8QM_M41_I2C0_SCL				11
     25 #define IMX8QM_M41_I2C0_SDA				12
     26 #define IMX8QM_M41_GPIO0_00				13
     27 #define IMX8QM_M41_GPIO0_01				14
     28 #define IMX8QM_GPT0_CLK					15
     29 #define IMX8QM_GPT0_CAPTURE				16
     30 #define IMX8QM_GPT0_COMPARE				17
     31 #define IMX8QM_GPT1_CLK					18
     32 #define IMX8QM_GPT1_CAPTURE				19
     33 #define IMX8QM_GPT1_COMPARE				20
     34 #define IMX8QM_UART0_RX					21
     35 #define IMX8QM_UART0_TX					22
     36 #define IMX8QM_UART0_RTS_B				23
     37 #define IMX8QM_UART0_CTS_B				24
     38 #define IMX8QM_UART1_TX					25
     39 #define IMX8QM_UART1_RX					26
     40 #define IMX8QM_UART1_RTS_B				27
     41 #define IMX8QM_UART1_CTS_B				28
     42 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH		29
     43 #define IMX8QM_SCU_PMIC_MEMC_ON				30
     44 #define IMX8QM_SCU_WDOG_OUT				31
     45 #define IMX8QM_PMIC_I2C_SDA				32
     46 #define IMX8QM_PMIC_I2C_SCL				33
     47 #define IMX8QM_PMIC_EARLY_WARNING			34
     48 #define IMX8QM_PMIC_INT_B				35
     49 #define IMX8QM_SCU_GPIO0_00				36
     50 #define IMX8QM_SCU_GPIO0_01				37
     51 #define IMX8QM_SCU_GPIO0_02				38
     52 #define IMX8QM_SCU_GPIO0_03				39
     53 #define IMX8QM_SCU_GPIO0_04				40
     54 #define IMX8QM_SCU_GPIO0_05				41
     55 #define IMX8QM_SCU_GPIO0_06				42
     56 #define IMX8QM_SCU_GPIO0_07				43
     57 #define IMX8QM_SCU_BOOT_MODE0				44
     58 #define IMX8QM_SCU_BOOT_MODE1				45
     59 #define IMX8QM_SCU_BOOT_MODE2				46
     60 #define IMX8QM_SCU_BOOT_MODE3				47
     61 #define IMX8QM_SCU_BOOT_MODE4				48
     62 #define IMX8QM_SCU_BOOT_MODE5				49
     63 #define IMX8QM_LVDS0_GPIO00				50
     64 #define IMX8QM_LVDS0_GPIO01				51
     65 #define IMX8QM_LVDS0_I2C0_SCL				52
     66 #define IMX8QM_LVDS0_I2C0_SDA				53
     67 #define IMX8QM_LVDS0_I2C1_SCL				54
     68 #define IMX8QM_LVDS0_I2C1_SDA				55
     69 #define IMX8QM_LVDS1_GPIO00				56
     70 #define IMX8QM_LVDS1_GPIO01				57
     71 #define IMX8QM_LVDS1_I2C0_SCL				58
     72 #define IMX8QM_LVDS1_I2C0_SDA				59
     73 #define IMX8QM_LVDS1_I2C1_SCL				60
     74 #define IMX8QM_LVDS1_I2C1_SDA				61
     75 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO		62
     76 #define IMX8QM_MIPI_DSI0_I2C0_SCL			63
     77 #define IMX8QM_MIPI_DSI0_I2C0_SDA			64
     78 #define IMX8QM_MIPI_DSI0_GPIO0_00			65
     79 #define IMX8QM_MIPI_DSI0_GPIO0_01			66
     80 #define IMX8QM_MIPI_DSI1_I2C0_SCL			67
     81 #define IMX8QM_MIPI_DSI1_I2C0_SDA			68
     82 #define IMX8QM_MIPI_DSI1_GPIO0_00			69
     83 #define IMX8QM_MIPI_DSI1_GPIO0_01			70
     84 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO	71
     85 #define IMX8QM_MIPI_CSI0_MCLK_OUT			72
     86 #define IMX8QM_MIPI_CSI0_I2C0_SCL			73
     87 #define IMX8QM_MIPI_CSI0_I2C0_SDA			74
     88 #define IMX8QM_MIPI_CSI0_GPIO0_00			75
     89 #define IMX8QM_MIPI_CSI0_GPIO0_01			76
     90 #define IMX8QM_MIPI_CSI1_MCLK_OUT			77
     91 #define IMX8QM_MIPI_CSI1_GPIO0_00			78
     92 #define IMX8QM_MIPI_CSI1_GPIO0_01			79
     93 #define IMX8QM_MIPI_CSI1_I2C0_SCL			80
     94 #define IMX8QM_MIPI_CSI1_I2C0_SDA			81
     95 #define IMX8QM_HDMI_TX0_TS_SCL				82
     96 #define IMX8QM_HDMI_TX0_TS_SDA				83
     97 #define IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO		84
     98 #define IMX8QM_ESAI1_FSR				85
     99 #define IMX8QM_ESAI1_FST				86
    100 #define IMX8QM_ESAI1_SCKR				87
    101 #define IMX8QM_ESAI1_SCKT				88
    102 #define IMX8QM_ESAI1_TX0				89
    103 #define IMX8QM_ESAI1_TX1				90
    104 #define IMX8QM_ESAI1_TX2_RX3				91
    105 #define IMX8QM_ESAI1_TX3_RX2				92
    106 #define IMX8QM_ESAI1_TX4_RX1				93
    107 #define IMX8QM_ESAI1_TX5_RX0				94
    108 #define IMX8QM_SPDIF0_RX				95
    109 #define IMX8QM_SPDIF0_TX				96
    110 #define IMX8QM_SPDIF0_EXT_CLK				97
    111 #define IMX8QM_SPI3_SCK					98
    112 #define IMX8QM_SPI3_SDO					99
    113 #define IMX8QM_SPI3_SDI					100
    114 #define IMX8QM_SPI3_CS0					101
    115 #define IMX8QM_SPI3_CS1					102
    116 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB		103
    117 #define IMX8QM_ESAI0_FSR				104
    118 #define IMX8QM_ESAI0_FST				105
    119 #define IMX8QM_ESAI0_SCKR				106
    120 #define IMX8QM_ESAI0_SCKT				107
    121 #define IMX8QM_ESAI0_TX0				108
    122 #define IMX8QM_ESAI0_TX1				109
    123 #define IMX8QM_ESAI0_TX2_RX3				110
    124 #define IMX8QM_ESAI0_TX3_RX2				111
    125 #define IMX8QM_ESAI0_TX4_RX1				112
    126 #define IMX8QM_ESAI0_TX5_RX0				113
    127 #define IMX8QM_MCLK_IN0					114
    128 #define IMX8QM_MCLK_OUT0				115
    129 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC		116
    130 #define IMX8QM_SPI0_SCK					117
    131 #define IMX8QM_SPI0_SDO					118
    132 #define IMX8QM_SPI0_SDI					119
    133 #define IMX8QM_SPI0_CS0					120
    134 #define IMX8QM_SPI0_CS1					121
    135 #define IMX8QM_SPI2_SCK					122
    136 #define IMX8QM_SPI2_SDO					123
    137 #define IMX8QM_SPI2_SDI					124
    138 #define IMX8QM_SPI2_CS0					125
    139 #define IMX8QM_SPI2_CS1					126
    140 #define IMX8QM_SAI1_RXC					127
    141 #define IMX8QM_SAI1_RXD					128
    142 #define IMX8QM_SAI1_RXFS				129
    143 #define IMX8QM_SAI1_TXC					130
    144 #define IMX8QM_SAI1_TXD					131
    145 #define IMX8QM_SAI1_TXFS				132
    146 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT		133
    147 #define IMX8QM_ADC_IN7					134
    148 #define IMX8QM_ADC_IN6					135
    149 #define IMX8QM_ADC_IN5					136
    150 #define IMX8QM_ADC_IN4					137
    151 #define IMX8QM_ADC_IN3					138
    152 #define IMX8QM_ADC_IN2					139
    153 #define IMX8QM_ADC_IN1					140
    154 #define IMX8QM_ADC_IN0					141
    155 #define IMX8QM_MLB_SIG					142
    156 #define IMX8QM_MLB_CLK					143
    157 #define IMX8QM_MLB_DATA					144
    158 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT		145
    159 #define IMX8QM_FLEXCAN0_RX				146
    160 #define IMX8QM_FLEXCAN0_TX				147
    161 #define IMX8QM_FLEXCAN1_RX				148
    162 #define IMX8QM_FLEXCAN1_TX				149
    163 #define IMX8QM_FLEXCAN2_RX				150
    164 #define IMX8QM_FLEXCAN2_TX				151
    165 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR		152
    166 #define IMX8QM_USB_SS3_TC0				153
    167 #define IMX8QM_USB_SS3_TC1				154
    168 #define IMX8QM_USB_SS3_TC2				155
    169 #define IMX8QM_USB_SS3_TC3				156
    170 #define IMX8QM_COMP_CTL_GPIO_3V3_USB3IO			157
    171 #define IMX8QM_USDHC1_RESET_B				158
    172 #define IMX8QM_USDHC1_VSELECT				159
    173 #define IMX8QM_USDHC2_RESET_B				160
    174 #define IMX8QM_USDHC2_VSELECT				161
    175 #define IMX8QM_USDHC2_WP				162
    176 #define IMX8QM_USDHC2_CD_B				163
    177 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP		164
    178 #define IMX8QM_ENET0_MDIO				165
    179 #define IMX8QM_ENET0_MDC				166
    180 #define IMX8QM_ENET0_REFCLK_125M_25M			167
    181 #define IMX8QM_ENET1_REFCLK_125M_25M			168
    182 #define IMX8QM_ENET1_MDIO				169
    183 #define IMX8QM_ENET1_MDC				170
    184 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT		171
    185 #define IMX8QM_QSPI1A_SS0_B				172
    186 #define IMX8QM_QSPI1A_SS1_B				173
    187 #define IMX8QM_QSPI1A_SCLK				174
    188 #define IMX8QM_QSPI1A_DQS				175
    189 #define IMX8QM_QSPI1A_DATA3				176
    190 #define IMX8QM_QSPI1A_DATA2				177
    191 #define IMX8QM_QSPI1A_DATA1				178
    192 #define IMX8QM_QSPI1A_DATA0				179
    193 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1		180
    194 #define IMX8QM_QSPI0A_DATA0				181
    195 #define IMX8QM_QSPI0A_DATA1				182
    196 #define IMX8QM_QSPI0A_DATA2				183
    197 #define IMX8QM_QSPI0A_DATA3				184
    198 #define IMX8QM_QSPI0A_DQS				185
    199 #define IMX8QM_QSPI0A_SS0_B				186
    200 #define IMX8QM_QSPI0A_SS1_B				187
    201 #define IMX8QM_QSPI0A_SCLK				188
    202 #define IMX8QM_QSPI0B_SCLK				189
    203 #define IMX8QM_QSPI0B_DATA0				190
    204 #define IMX8QM_QSPI0B_DATA1				191
    205 #define IMX8QM_QSPI0B_DATA2				192
    206 #define IMX8QM_QSPI0B_DATA3				193
    207 #define IMX8QM_QSPI0B_DQS				194
    208 #define IMX8QM_QSPI0B_SS0_B				195
    209 #define IMX8QM_QSPI0B_SS1_B				196
    210 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0		197
    211 #define IMX8QM_PCIE_CTRL0_CLKREQ_B			198
    212 #define IMX8QM_PCIE_CTRL0_WAKE_B			199
    213 #define IMX8QM_PCIE_CTRL0_PERST_B			200
    214 #define IMX8QM_PCIE_CTRL1_CLKREQ_B			201
    215 #define IMX8QM_PCIE_CTRL1_WAKE_B			202
    216 #define IMX8QM_PCIE_CTRL1_PERST_B			203
    217 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP		204
    218 #define IMX8QM_USB_HSIC0_DATA				205
    219 #define IMX8QM_USB_HSIC0_STROBE				206
    220 #define IMX8QM_CALIBRATION_0_HSIC			207
    221 #define IMX8QM_CALIBRATION_1_HSIC			208
    222 #define IMX8QM_EMMC0_CLK				209
    223 #define IMX8QM_EMMC0_CMD				210
    224 #define IMX8QM_EMMC0_DATA0				211
    225 #define IMX8QM_EMMC0_DATA1				212
    226 #define IMX8QM_EMMC0_DATA2				213
    227 #define IMX8QM_EMMC0_DATA3				214
    228 #define IMX8QM_EMMC0_DATA4				215
    229 #define IMX8QM_EMMC0_DATA5				216
    230 #define IMX8QM_EMMC0_DATA6				217
    231 #define IMX8QM_EMMC0_DATA7				218
    232 #define IMX8QM_EMMC0_STROBE				219
    233 #define IMX8QM_EMMC0_RESET_B				220
    234 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX		221
    235 #define IMX8QM_USDHC1_CLK				222
    236 #define IMX8QM_USDHC1_CMD				223
    237 #define IMX8QM_USDHC1_DATA0				224
    238 #define IMX8QM_USDHC1_DATA1				225
    239 #define IMX8QM_CTL_NAND_RE_P_N				226
    240 #define IMX8QM_USDHC1_DATA2				227
    241 #define IMX8QM_USDHC1_DATA3				228
    242 #define IMX8QM_CTL_NAND_DQS_P_N				229
    243 #define IMX8QM_USDHC1_DATA4				230
    244 #define IMX8QM_USDHC1_DATA5				231
    245 #define IMX8QM_USDHC1_DATA6				232
    246 #define IMX8QM_USDHC1_DATA7				233
    247 #define IMX8QM_USDHC1_STROBE				234
    248 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2		235
    249 #define IMX8QM_USDHC2_CLK				236
    250 #define IMX8QM_USDHC2_CMD				237
    251 #define IMX8QM_USDHC2_DATA0				238
    252 #define IMX8QM_USDHC2_DATA1				239
    253 #define IMX8QM_USDHC2_DATA2				240
    254 #define IMX8QM_USDHC2_DATA3				241
    255 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3		242
    256 #define IMX8QM_ENET0_RGMII_TXC				243
    257 #define IMX8QM_ENET0_RGMII_TX_CTL			244
    258 #define IMX8QM_ENET0_RGMII_TXD0				245
    259 #define IMX8QM_ENET0_RGMII_TXD1				246
    260 #define IMX8QM_ENET0_RGMII_TXD2				247
    261 #define IMX8QM_ENET0_RGMII_TXD3				248
    262 #define IMX8QM_ENET0_RGMII_RXC				249
    263 #define IMX8QM_ENET0_RGMII_RX_CTL			250
    264 #define IMX8QM_ENET0_RGMII_RXD0				251
    265 #define IMX8QM_ENET0_RGMII_RXD1				252
    266 #define IMX8QM_ENET0_RGMII_RXD2				253
    267 #define IMX8QM_ENET0_RGMII_RXD3				254
    268 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB		255
    269 #define IMX8QM_ENET1_RGMII_TXC				256
    270 #define IMX8QM_ENET1_RGMII_TX_CTL			257
    271 #define IMX8QM_ENET1_RGMII_TXD0				258
    272 #define IMX8QM_ENET1_RGMII_TXD1				259
    273 #define IMX8QM_ENET1_RGMII_TXD2				260
    274 #define IMX8QM_ENET1_RGMII_TXD3				261
    275 #define IMX8QM_ENET1_RGMII_RXC				262
    276 #define IMX8QM_ENET1_RGMII_RX_CTL			263
    277 #define IMX8QM_ENET1_RGMII_RXD0				264
    278 #define IMX8QM_ENET1_RGMII_RXD1				265
    279 #define IMX8QM_ENET1_RGMII_RXD2				266
    280 #define IMX8QM_ENET1_RGMII_RXD3				267
    281 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA		268
    282 
    283 /*
    284  * format: <pin_id mux_mode>
    285  */
    286 #define IMX8QM_SIM0_CLK_DMA_SIM0_CLK				IMX8QM_SIM0_CLK			0
    287 #define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00				IMX8QM_SIM0_CLK			3
    288 #define IMX8QM_SIM0_RST_DMA_SIM0_RST				IMX8QM_SIM0_RST			0
    289 #define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01				IMX8QM_SIM0_RST			3
    290 #define IMX8QM_SIM0_IO_DMA_SIM0_IO				IMX8QM_SIM0_IO			0
    291 #define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02				IMX8QM_SIM0_IO			3
    292 #define IMX8QM_SIM0_PD_DMA_SIM0_PD				IMX8QM_SIM0_PD			0
    293 #define IMX8QM_SIM0_PD_DMA_I2C3_SCL				IMX8QM_SIM0_PD			1
    294 #define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03				IMX8QM_SIM0_PD			3
    295 #define IMX8QM_SIM0_POWER_EN_DMA_SIM0_POWER_EN			IMX8QM_SIM0_POWER_EN		0
    296 #define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA			IMX8QM_SIM0_POWER_EN		1
    297 #define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04			IMX8QM_SIM0_POWER_EN		3
    298 #define IMX8QM_SIM0_GPIO0_00_DMA_SIM0_POWER_EN			IMX8QM_SIM0_GPIO0_00		0
    299 #define IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05			IMX8QM_SIM0_GPIO0_00		3
    300 #define IMX8QM_M40_I2C0_SCL_M40_I2C0_SCL			IMX8QM_M40_I2C0_SCL		0
    301 #define IMX8QM_M40_I2C0_SCL_M40_UART0_RX			IMX8QM_M40_I2C0_SCL		1
    302 #define IMX8QM_M40_I2C0_SCL_M40_GPIO0_IO02			IMX8QM_M40_I2C0_SCL		2
    303 #define IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06			IMX8QM_M40_I2C0_SCL		3
    304 #define IMX8QM_M40_I2C0_SDA_M40_I2C0_SDA			IMX8QM_M40_I2C0_SDA		0
    305 #define IMX8QM_M40_I2C0_SDA_M40_UART0_TX			IMX8QM_M40_I2C0_SDA		1
    306 #define IMX8QM_M40_I2C0_SDA_M40_GPIO0_IO03			IMX8QM_M40_I2C0_SDA		2
    307 #define IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07			IMX8QM_M40_I2C0_SDA		3
    308 #define IMX8QM_M40_GPIO0_00_M40_GPIO0_IO00			IMX8QM_M40_GPIO0_00		0
    309 #define IMX8QM_M40_GPIO0_00_M40_TPM0_CH0			IMX8QM_M40_GPIO0_00		1
    310 #define IMX8QM_M40_GPIO0_00_DMA_UART4_RX			IMX8QM_M40_GPIO0_00		2
    311 #define IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08			IMX8QM_M40_GPIO0_00		3
    312 #define IMX8QM_M40_GPIO0_01_M40_GPIO0_IO01			IMX8QM_M40_GPIO0_01		0
    313 #define IMX8QM_M40_GPIO0_01_M40_TPM0_CH1			IMX8QM_M40_GPIO0_01		1
    314 #define IMX8QM_M40_GPIO0_01_DMA_UART4_TX			IMX8QM_M40_GPIO0_01		2
    315 #define IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09			IMX8QM_M40_GPIO0_01		3
    316 #define IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL			IMX8QM_M41_I2C0_SCL		0
    317 #define IMX8QM_M41_I2C0_SCL_M41_UART0_RX			IMX8QM_M41_I2C0_SCL		1
    318 #define IMX8QM_M41_I2C0_SCL_M41_GPIO0_IO02			IMX8QM_M41_I2C0_SCL		2
    319 #define IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10			IMX8QM_M41_I2C0_SCL		3
    320 #define IMX8QM_M41_I2C0_SDA_M41_I2C0_SDA			IMX8QM_M41_I2C0_SDA		0
    321 #define IMX8QM_M41_I2C0_SDA_M41_UART0_TX			IMX8QM_M41_I2C0_SDA		1
    322 #define IMX8QM_M41_I2C0_SDA_M41_GPIO0_IO03			IMX8QM_M41_I2C0_SDA		2
    323 #define IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11			IMX8QM_M41_I2C0_SDA		3
    324 #define IMX8QM_M41_GPIO0_00_M41_GPIO0_IO00			IMX8QM_M41_GPIO0_00		0
    325 #define IMX8QM_M41_GPIO0_00_M41_TPM0_CH0			IMX8QM_M41_GPIO0_00		1
    326 #define IMX8QM_M41_GPIO0_00_DMA_UART3_RX			IMX8QM_M41_GPIO0_00		2
    327 #define IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12			IMX8QM_M41_GPIO0_00		3
    328 #define IMX8QM_M41_GPIO0_01_M41_GPIO0_IO01			IMX8QM_M41_GPIO0_01		0
    329 #define IMX8QM_M41_GPIO0_01_M41_TPM0_CH1			IMX8QM_M41_GPIO0_01		1
    330 #define IMX8QM_M41_GPIO0_01_DMA_UART3_TX			IMX8QM_M41_GPIO0_01		2
    331 #define IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13			IMX8QM_M41_GPIO0_01		3
    332 #define IMX8QM_GPT0_CLK_LSIO_GPT0_CLK				IMX8QM_GPT0_CLK			0
    333 #define IMX8QM_GPT0_CLK_DMA_I2C1_SCL				IMX8QM_GPT0_CLK			1
    334 #define IMX8QM_GPT0_CLK_LSIO_KPP0_COL4				IMX8QM_GPT0_CLK			2
    335 #define IMX8QM_GPT0_CLK_LSIO_GPIO0_IO14				IMX8QM_GPT0_CLK			3
    336 #define IMX8QM_GPT0_CAPTURE_LSIO_GPT0_CAPTURE			IMX8QM_GPT0_CAPTURE		0
    337 #define IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA			IMX8QM_GPT0_CAPTURE		1
    338 #define IMX8QM_GPT0_CAPTURE_LSIO_KPP0_COL5			IMX8QM_GPT0_CAPTURE		2
    339 #define IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15			IMX8QM_GPT0_CAPTURE		3
    340 #define IMX8QM_GPT0_COMPARE_LSIO_GPT0_COMPARE			IMX8QM_GPT0_COMPARE		0
    341 #define IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT			IMX8QM_GPT0_COMPARE		1
    342 #define IMX8QM_GPT0_COMPARE_LSIO_KPP0_COL6			IMX8QM_GPT0_COMPARE		2
    343 #define IMX8QM_GPT0_COMPARE_LSIO_GPIO0_IO16			IMX8QM_GPT0_COMPARE		3
    344 #define IMX8QM_GPT1_CLK_LSIO_GPT1_CLK				IMX8QM_GPT1_CLK			0
    345 #define IMX8QM_GPT1_CLK_DMA_I2C2_SCL				IMX8QM_GPT1_CLK			1
    346 #define IMX8QM_GPT1_CLK_LSIO_KPP0_COL7				IMX8QM_GPT1_CLK			2
    347 #define IMX8QM_GPT1_CLK_LSIO_GPIO0_IO17				IMX8QM_GPT1_CLK			3
    348 #define IMX8QM_GPT1_CAPTURE_LSIO_GPT1_CAPTURE			IMX8QM_GPT1_CAPTURE		0
    349 #define IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA			IMX8QM_GPT1_CAPTURE		1
    350 #define IMX8QM_GPT1_CAPTURE_LSIO_KPP0_ROW4			IMX8QM_GPT1_CAPTURE		2
    351 #define IMX8QM_GPT1_CAPTURE_LSIO_GPIO0_IO18			IMX8QM_GPT1_CAPTURE		3
    352 #define IMX8QM_GPT1_COMPARE_LSIO_GPT1_COMPARE			IMX8QM_GPT1_COMPARE		0
    353 #define IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT			IMX8QM_GPT1_COMPARE		1
    354 #define IMX8QM_GPT1_COMPARE_LSIO_KPP0_ROW5			IMX8QM_GPT1_COMPARE		2
    355 #define IMX8QM_GPT1_COMPARE_LSIO_GPIO0_IO19			IMX8QM_GPT1_COMPARE		3
    356 #define IMX8QM_UART0_RX_DMA_UART0_RX				IMX8QM_UART0_RX			0
    357 #define IMX8QM_UART0_RX_SCU_UART0_RX				IMX8QM_UART0_RX			1
    358 #define IMX8QM_UART0_RX_LSIO_GPIO0_IO20				IMX8QM_UART0_RX			3
    359 #define IMX8QM_UART0_TX_DMA_UART0_TX				IMX8QM_UART0_TX			0
    360 #define IMX8QM_UART0_TX_SCU_UART0_TX				IMX8QM_UART0_TX			1
    361 #define IMX8QM_UART0_TX_LSIO_GPIO0_IO21				IMX8QM_UART0_TX			3
    362 #define IMX8QM_UART0_RTS_B_DMA_UART0_RTS_B			IMX8QM_UART0_RTS_B		0
    363 #define IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT			IMX8QM_UART0_RTS_B		1
    364 #define IMX8QM_UART0_RTS_B_DMA_UART2_RX				IMX8QM_UART0_RTS_B		2
    365 #define IMX8QM_UART0_RTS_B_LSIO_GPIO0_IO22			IMX8QM_UART0_RTS_B		3
    366 #define IMX8QM_UART0_CTS_B_DMA_UART0_CTS_B			IMX8QM_UART0_CTS_B		0
    367 #define IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT			IMX8QM_UART0_CTS_B		1
    368 #define IMX8QM_UART0_CTS_B_DMA_UART2_TX				IMX8QM_UART0_CTS_B		2
    369 #define IMX8QM_UART0_CTS_B_LSIO_GPIO0_IO23			IMX8QM_UART0_CTS_B		3
    370 #define IMX8QM_UART1_TX_DMA_UART1_TX				IMX8QM_UART1_TX			0
    371 #define IMX8QM_UART1_TX_DMA_SPI3_SCK				IMX8QM_UART1_TX			1
    372 #define IMX8QM_UART1_TX_LSIO_GPIO0_IO24				IMX8QM_UART1_TX			3
    373 #define IMX8QM_UART1_RX_DMA_UART1_RX				IMX8QM_UART1_RX			0
    374 #define IMX8QM_UART1_RX_DMA_SPI3_SDO				IMX8QM_UART1_RX			1
    375 #define IMX8QM_UART1_RX_LSIO_GPIO0_IO25				IMX8QM_UART1_RX			3
    376 #define IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B			IMX8QM_UART1_RTS_B		0
    377 #define IMX8QM_UART1_RTS_B_DMA_SPI3_SDI				IMX8QM_UART1_RTS_B		1
    378 #define IMX8QM_UART1_RTS_B_DMA_UART1_CTS_B			IMX8QM_UART1_RTS_B		2
    379 #define IMX8QM_UART1_RTS_B_LSIO_GPIO0_IO26			IMX8QM_UART1_RTS_B		3
    380 #define IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B			IMX8QM_UART1_CTS_B		0
    381 #define IMX8QM_UART1_CTS_B_DMA_SPI3_CS0				IMX8QM_UART1_CTS_B		1
    382 #define IMX8QM_UART1_CTS_B_DMA_UART1_RTS_B			IMX8QM_UART1_CTS_B		2
    383 #define IMX8QM_UART1_CTS_B_LSIO_GPIO0_IO27			IMX8QM_UART1_CTS_B		3
    384 #define IMX8QM_SCU_PMIC_MEMC_ON_SCU_GPIO0_IOXX_PMIC_MEMC_ON	IMX8QM_SCU_PMIC_MEMC_ON		0
    385 #define IMX8QM_SCU_WDOG_OUT_SCU_WDOG0_WDOG_OUT			IMX8QM_SCU_WDOG_OUT		0
    386 #define IMX8QM_PMIC_I2C_SDA_SCU_PMIC_I2C_SDA			IMX8QM_PMIC_I2C_SDA		0
    387 #define IMX8QM_PMIC_I2C_SCL_SCU_PMIC_I2C_SCL			IMX8QM_PMIC_I2C_SCL		0
    388 #define IMX8QM_PMIC_EARLY_WARNING_SCU_PMIC_EARLY_WARNING	IMX8QM_PMIC_EARLY_WARNING	0
    389 #define IMX8QM_PMIC_INT_B_SCU_DIMX8QMMIC_INT_B			IMX8QM_PMIC_INT_B		0
    390 #define IMX8QM_SCU_GPIO0_00_SCU_GPIO0_IO00			IMX8QM_SCU_GPIO0_00		0
    391 #define IMX8QM_SCU_GPIO0_00_SCU_UART0_RX			IMX8QM_SCU_GPIO0_00		1
    392 #define IMX8QM_SCU_GPIO0_00_LSIO_GPIO0_IO28			IMX8QM_SCU_GPIO0_00		3
    393 #define IMX8QM_SCU_GPIO0_01_SCU_GPIO0_IO01			IMX8QM_SCU_GPIO0_01		0
    394 #define IMX8QM_SCU_GPIO0_01_SCU_UART0_TX			IMX8QM_SCU_GPIO0_01		1
    395 #define IMX8QM_SCU_GPIO0_01_LSIO_GPIO0_IO29			IMX8QM_SCU_GPIO0_01		3
    396 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IO02			IMX8QM_SCU_GPIO0_02		0
    397 #define IMX8QM_SCU_GPIO0_02_SCU_GPIO0_IOXX_PMIC_GPU0_ON		IMX8QM_SCU_GPIO0_02		1
    398 #define IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30			IMX8QM_SCU_GPIO0_02		3
    399 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IO03			IMX8QM_SCU_GPIO0_03		0
    400 #define IMX8QM_SCU_GPIO0_03_SCU_GPIO0_IOXX_PMIC_GPU1_ON		IMX8QM_SCU_GPIO0_03		1
    401 #define IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31			IMX8QM_SCU_GPIO0_03		3
    402 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IO04			IMX8QM_SCU_GPIO0_04		0
    403 #define IMX8QM_SCU_GPIO0_04_SCU_GPIO0_IOXX_PMIC_A72_ON		IMX8QM_SCU_GPIO0_04		1
    404 #define IMX8QM_SCU_GPIO0_04_LSIO_GPIO1_IO00			IMX8QM_SCU_GPIO0_04		3
    405 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IO05			IMX8QM_SCU_GPIO0_05		0
    406 #define IMX8QM_SCU_GPIO0_05_SCU_GPIO0_IOXX_PMIC_A53_ON		IMX8QM_SCU_GPIO0_05		1
    407 #define IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01			IMX8QM_SCU_GPIO0_05		3
    408 #define IMX8QM_SCU_GPIO0_06_SCU_GPIO0_IO06			IMX8QM_SCU_GPIO0_06		0
    409 #define IMX8QM_SCU_GPIO0_06_SCU_TPM0_CH0			IMX8QM_SCU_GPIO0_06		1
    410 #define IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02			IMX8QM_SCU_GPIO0_06		3
    411 #define IMX8QM_SCU_GPIO0_07_SCU_GPIO0_IO07			IMX8QM_SCU_GPIO0_07		0
    412 #define IMX8QM_SCU_GPIO0_07_SCU_TPM0_CH1			IMX8QM_SCU_GPIO0_07		1
    413 #define IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K	IMX8QM_SCU_GPIO0_07		2
    414 #define IMX8QM_SCU_GPIO0_07_LSIO_GPIO1_IO03			IMX8QM_SCU_GPIO0_07		3
    415 #define IMX8QM_SCU_BOOT_MODE0_SCU_DSC_BOOT_MODE0		IMX8QM_SCU_BOOT_MODE0		0
    416 #define IMX8QM_SCU_BOOT_MODE1_SCU_DSC_BOOT_MODE1		IMX8QM_SCU_BOOT_MODE1		0
    417 #define IMX8QM_SCU_BOOT_MODE2_SCU_DSC_BOOT_MODE2		IMX8QM_SCU_BOOT_MODE2		0
    418 #define IMX8QM_SCU_BOOT_MODE3_SCU_DSC_BOOT_MODE3		IMX8QM_SCU_BOOT_MODE3		0
    419 #define IMX8QM_SCU_BOOT_MODE4_SCU_DSC_BOOT_MODE4		IMX8QM_SCU_BOOT_MODE4		0
    420 #define IMX8QM_SCU_BOOT_MODE4_SCU_PMIC_I2C_SCL			IMX8QM_SCU_BOOT_MODE4		1
    421 #define IMX8QM_SCU_BOOT_MODE5_SCU_DSC_BOOT_MODE5		IMX8QM_SCU_BOOT_MODE5		0
    422 #define IMX8QM_SCU_BOOT_MODE5_SCU_PMIC_I2C_SDA			IMX8QM_SCU_BOOT_MODE5		1
    423 #define IMX8QM_LVDS0_GPIO00_LVDS0_GPIO0_IO00			IMX8QM_LVDS0_GPIO00		0
    424 #define IMX8QM_LVDS0_GPIO00_LVDS0_PWM0_OUT			IMX8QM_LVDS0_GPIO00		1
    425 #define IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04			IMX8QM_LVDS0_GPIO00		3
    426 #define IMX8QM_LVDS0_GPIO01_LVDS0_GPIO0_IO01			IMX8QM_LVDS0_GPIO01		0
    427 #define IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05			IMX8QM_LVDS0_GPIO01		3
    428 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_I2C0_SCL			IMX8QM_LVDS0_I2C0_SCL		0
    429 #define IMX8QM_LVDS0_I2C0_SCL_LVDS0_GPIO0_IO02			IMX8QM_LVDS0_I2C0_SCL		1
    430 #define IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06			IMX8QM_LVDS0_I2C0_SCL		3
    431 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_I2C0_SDA			IMX8QM_LVDS0_I2C0_SDA		0
    432 #define IMX8QM_LVDS0_I2C0_SDA_LVDS0_GPIO0_IO03			IMX8QM_LVDS0_I2C0_SDA		1
    433 #define IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07			IMX8QM_LVDS0_I2C0_SDA		3
    434 #define IMX8QM_LVDS0_I2C1_SCL_LVDS0_I2C1_SCL			IMX8QM_LVDS0_I2C1_SCL		0
    435 #define IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX			IMX8QM_LVDS0_I2C1_SCL		1
    436 #define IMX8QM_LVDS0_I2C1_SCL_LSIO_GPIO1_IO08			IMX8QM_LVDS0_I2C1_SCL		3
    437 #define IMX8QM_LVDS0_I2C1_SDA_LVDS0_I2C1_SDA			IMX8QM_LVDS0_I2C1_SDA		0
    438 #define IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX			IMX8QM_LVDS0_I2C1_SDA		1
    439 #define IMX8QM_LVDS0_I2C1_SDA_LSIO_GPIO1_IO09			IMX8QM_LVDS0_I2C1_SDA		3
    440 #define IMX8QM_LVDS1_GPIO00_LVDS1_GPIO0_IO00			IMX8QM_LVDS1_GPIO00		0
    441 #define IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT			IMX8QM_LVDS1_GPIO00		1
    442 #define IMX8QM_LVDS1_GPIO00_LSIO_GPIO1_IO10			IMX8QM_LVDS1_GPIO00		3
    443 #define IMX8QM_LVDS1_GPIO01_LVDS1_GPIO0_IO01			IMX8QM_LVDS1_GPIO01		0
    444 #define IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11			IMX8QM_LVDS1_GPIO01		3
    445 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_I2C0_SCL			IMX8QM_LVDS1_I2C0_SCL		0
    446 #define IMX8QM_LVDS1_I2C0_SCL_LVDS1_GPIO0_IO02			IMX8QM_LVDS1_I2C0_SCL		1
    447 #define IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12			IMX8QM_LVDS1_I2C0_SCL		3
    448 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_I2C0_SDA			IMX8QM_LVDS1_I2C0_SDA		0
    449 #define IMX8QM_LVDS1_I2C0_SDA_LVDS1_GPIO0_IO03			IMX8QM_LVDS1_I2C0_SDA		1
    450 #define IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13			IMX8QM_LVDS1_I2C0_SDA		3
    451 #define IMX8QM_LVDS1_I2C1_SCL_LVDS1_I2C1_SCL			IMX8QM_LVDS1_I2C1_SCL		0
    452 #define IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX			IMX8QM_LVDS1_I2C1_SCL		1
    453 #define IMX8QM_LVDS1_I2C1_SCL_LSIO_GPIO1_IO14			IMX8QM_LVDS1_I2C1_SCL		3
    454 #define IMX8QM_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA			IMX8QM_LVDS1_I2C1_SDA		0
    455 #define IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX			IMX8QM_LVDS1_I2C1_SDA		1
    456 #define IMX8QM_LVDS1_I2C1_SDA_LSIO_GPIO1_IO15			IMX8QM_LVDS1_I2C1_SDA		3
    457 #define IMX8QM_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL		IMX8QM_MIPI_DSI0_I2C0_SCL	0
    458 #define IMX8QM_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_IO16		IMX8QM_MIPI_DSI0_I2C0_SCL	3
    459 #define IMX8QM_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA		IMX8QM_MIPI_DSI0_I2C0_SDA	0
    460 #define IMX8QM_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_IO17		IMX8QM_MIPI_DSI0_I2C0_SDA	3
    461 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_GPIO0_IO00		IMX8QM_MIPI_DSI0_GPIO0_00	0
    462 #define IMX8QM_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT		IMX8QM_MIPI_DSI0_GPIO0_00	1
    463 #define IMX8QM_MIPI_DSI0_GPIO0_00_LSIO_GPIO1_IO18		IMX8QM_MIPI_DSI0_GPIO0_00	3
    464 #define IMX8QM_MIPI_DSI0_GPIO0_01_MIPI_DSI0_GPIO0_IO01		IMX8QM_MIPI_DSI0_GPIO0_01	0
    465 #define IMX8QM_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO19		IMX8QM_MIPI_DSI0_GPIO0_01	3
    466 #define IMX8QM_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL		IMX8QM_MIPI_DSI1_I2C0_SCL	0
    467 #define IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20		IMX8QM_MIPI_DSI1_I2C0_SCL	3
    468 #define IMX8QM_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA		IMX8QM_MIPI_DSI1_I2C0_SDA	0
    469 #define IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21		IMX8QM_MIPI_DSI1_I2C0_SDA	3
    470 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_GPIO0_IO00		IMX8QM_MIPI_DSI1_GPIO0_00	0
    471 #define IMX8QM_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT		IMX8QM_MIPI_DSI1_GPIO0_00	1
    472 #define IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22		IMX8QM_MIPI_DSI1_GPIO0_00	3
    473 #define IMX8QM_MIPI_DSI1_GPIO0_01_MIPI_DSI1_GPIO0_IO01		IMX8QM_MIPI_DSI1_GPIO0_01	0
    474 #define IMX8QM_MIPI_DSI1_GPIO0_01_LSIO_GPIO1_IO23		IMX8QM_MIPI_DSI1_GPIO0_01	3
    475 #define IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT	IMX8QM_MIPI_CSI0_MCLK_OUT	0
    476 #define IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24		IMX8QM_MIPI_CSI0_MCLK_OUT	3
    477 #define IMX8QM_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL		IMX8QM_MIPI_CSI0_I2C0_SCL	0
    478 #define IMX8QM_MIPI_CSI0_I2C0_SCL_LSIO_GPIO1_IO25		IMX8QM_MIPI_CSI0_I2C0_SCL	3
    479 #define IMX8QM_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA		IMX8QM_MIPI_CSI0_I2C0_SDA	0
    480 #define IMX8QM_MIPI_CSI0_I2C0_SDA_LSIO_GPIO1_IO26		IMX8QM_MIPI_CSI0_I2C0_SDA	3
    481 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI0_GPIO0_IO00		IMX8QM_MIPI_CSI0_GPIO0_00	0
    482 #define IMX8QM_MIPI_CSI0_GPIO0_00_DMA_I2C0_SCL			IMX8QM_MIPI_CSI0_GPIO0_00	1
    483 #define IMX8QM_MIPI_CSI0_GPIO0_00_MIPI_CSI1_I2C0_SCL		IMX8QM_MIPI_CSI0_GPIO0_00	2
    484 #define IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27		IMX8QM_MIPI_CSI0_GPIO0_00	3
    485 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI0_GPIO0_IO01		IMX8QM_MIPI_CSI0_GPIO0_01	0
    486 #define IMX8QM_MIPI_CSI0_GPIO0_01_DMA_I2C0_SDA			IMX8QM_MIPI_CSI0_GPIO0_01	1
    487 #define IMX8QM_MIPI_CSI0_GPIO0_01_MIPI_CSI1_I2C0_SDA		IMX8QM_MIPI_CSI0_GPIO0_01	2
    488 #define IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28		IMX8QM_MIPI_CSI0_GPIO0_01	3
    489 #define IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT	IMX8QM_MIPI_CSI1_MCLK_OUT	0
    490 #define IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29		IMX8QM_MIPI_CSI1_MCLK_OUT	3
    491 #define IMX8QM_MIPI_CSI1_GPIO0_00_MIPI_CSI1_GPIO0_IO00		IMX8QM_MIPI_CSI1_GPIO0_00	0
    492 #define IMX8QM_MIPI_CSI1_GPIO0_00_DMA_UART4_RX			IMX8QM_MIPI_CSI1_GPIO0_00	1
    493 #define IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30		IMX8QM_MIPI_CSI1_GPIO0_00	3
    494 #define IMX8QM_MIPI_CSI1_GPIO0_01_MIPI_CSI1_GPIO0_IO01		IMX8QM_MIPI_CSI1_GPIO0_01	0
    495 #define IMX8QM_MIPI_CSI1_GPIO0_01_DMA_UART4_TX			IMX8QM_MIPI_CSI1_GPIO0_01	1
    496 #define IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31		IMX8QM_MIPI_CSI1_GPIO0_01	3
    497 #define IMX8QM_MIPI_CSI1_I2C0_SCL_MIPI_CSI1_I2C0_SCL		IMX8QM_MIPI_CSI1_I2C0_SCL	0
    498 #define IMX8QM_MIPI_CSI1_I2C0_SCL_LSIO_GPIO2_IO00		IMX8QM_MIPI_CSI1_I2C0_SCL	3
    499 #define IMX8QM_MIPI_CSI1_I2C0_SDA_MIPI_CSI1_I2C0_SDA		IMX8QM_MIPI_CSI1_I2C0_SDA	0
    500 #define IMX8QM_MIPI_CSI1_I2C0_SDA_LSIO_GPIO2_IO01		IMX8QM_MIPI_CSI1_I2C0_SDA	3
    501 #define IMX8QM_HDMI_TX0_TS_SCL_HDMI_TX0_I2C0_SCL		IMX8QM_HDMI_TX0_TS_SCL		0
    502 #define IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL			IMX8QM_HDMI_TX0_TS_SCL		1
    503 #define IMX8QM_HDMI_TX0_TS_SCL_LSIO_GPIO2_IO02			IMX8QM_HDMI_TX0_TS_SCL		3
    504 #define IMX8QM_HDMI_TX0_TS_SDA_HDMI_TX0_I2C0_SDA		IMX8QM_HDMI_TX0_TS_SDA		0
    505 #define IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA			IMX8QM_HDMI_TX0_TS_SDA		1
    506 #define IMX8QM_HDMI_TX0_TS_SDA_LSIO_GPIO2_IO03			IMX8QM_HDMI_TX0_TS_SDA		3
    507 #define IMX8QM_ESAI1_FSR_AUD_ESAI1_FSR				IMX8QM_ESAI1_FSR		0
    508 #define IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04			IMX8QM_ESAI1_FSR		3
    509 #define IMX8QM_ESAI1_FST_AUD_ESAI1_FST				IMX8QM_ESAI1_FST		0
    510 #define IMX8QM_ESAI1_FST_AUD_SPDIF0_EXT_CLK			IMX8QM_ESAI1_FST		1
    511 #define IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05			IMX8QM_ESAI1_FST		3
    512 #define IMX8QM_ESAI1_SCKR_AUD_ESAI1_SCKR			IMX8QM_ESAI1_SCKR		0
    513 #define IMX8QM_ESAI1_SCKR_LSIO_GPIO2_IO06			IMX8QM_ESAI1_SCKR		3
    514 #define IMX8QM_ESAI1_SCKT_AUD_ESAI1_SCKT			IMX8QM_ESAI1_SCKT		0
    515 #define IMX8QM_ESAI1_SCKT_AUD_SAI2_RXC				IMX8QM_ESAI1_SCKT		1
    516 #define IMX8QM_ESAI1_SCKT_AUD_SPDIF0_EXT_CLK			IMX8QM_ESAI1_SCKT		2
    517 #define IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07			IMX8QM_ESAI1_SCKT		3
    518 #define IMX8QM_ESAI1_TX0_AUD_ESAI1_TX0				IMX8QM_ESAI1_TX0		0
    519 #define IMX8QM_ESAI1_TX0_AUD_SAI2_RXD				IMX8QM_ESAI1_TX0		1
    520 #define IMX8QM_ESAI1_TX0_AUD_SPDIF0_RX				IMX8QM_ESAI1_TX0		2
    521 #define IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08			IMX8QM_ESAI1_TX0		3
    522 #define IMX8QM_ESAI1_TX1_AUD_ESAI1_TX1				IMX8QM_ESAI1_TX1		0
    523 #define IMX8QM_ESAI1_TX1_AUD_SAI2_RXFS				IMX8QM_ESAI1_TX1		1
    524 #define IMX8QM_ESAI1_TX1_AUD_SPDIF0_TX				IMX8QM_ESAI1_TX1		2
    525 #define IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09			IMX8QM_ESAI1_TX1		3
    526 #define IMX8QM_ESAI1_TX2_RX3_AUD_ESAI1_TX2_RX3			IMX8QM_ESAI1_TX2_RX3		0
    527 #define IMX8QM_ESAI1_TX2_RX3_AUD_SPDIF0_RX			IMX8QM_ESAI1_TX2_RX3		1
    528 #define IMX8QM_ESAI1_TX2_RX3_LSIO_GPIO2_IO10			IMX8QM_ESAI1_TX2_RX3		3
    529 #define IMX8QM_ESAI1_TX3_RX2_AUD_ESAI1_TX3_RX2			IMX8QM_ESAI1_TX3_RX2		0
    530 #define IMX8QM_ESAI1_TX3_RX2_AUD_SPDIF0_TX			IMX8QM_ESAI1_TX3_RX2		1
    531 #define IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11			IMX8QM_ESAI1_TX3_RX2		3
    532 #define IMX8QM_ESAI1_TX4_RX1_AUD_ESAI1_TX4_RX1			IMX8QM_ESAI1_TX4_RX1		0
    533 #define IMX8QM_ESAI1_TX4_RX1_LSIO_GPIO2_IO12			IMX8QM_ESAI1_TX4_RX1		3
    534 #define IMX8QM_ESAI1_TX5_RX0_AUD_ESAI1_TX5_RX0			IMX8QM_ESAI1_TX5_RX0		0
    535 #define IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13			IMX8QM_ESAI1_TX5_RX0		3
    536 #define IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX				IMX8QM_SPDIF0_RX		0
    537 #define IMX8QM_SPDIF0_RX_AUD_MQS_R				IMX8QM_SPDIF0_RX		1
    538 #define IMX8QM_SPDIF0_RX_AUD_ACM_MCLK_IN1			IMX8QM_SPDIF0_RX		2
    539 #define IMX8QM_SPDIF0_RX_LSIO_GPIO2_IO14			IMX8QM_SPDIF0_RX		3
    540 #define IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX				IMX8QM_SPDIF0_TX		0
    541 #define IMX8QM_SPDIF0_TX_AUD_MQS_L				IMX8QM_SPDIF0_TX		1
    542 #define IMX8QM_SPDIF0_TX_AUD_ACM_MCLK_OUT1			IMX8QM_SPDIF0_TX		2
    543 #define IMX8QM_SPDIF0_TX_LSIO_GPIO2_IO15			IMX8QM_SPDIF0_TX		3
    544 #define IMX8QM_SPDIF0_EXT_CLK_AUD_SPDIF0_EXT_CLK		IMX8QM_SPDIF0_EXT_CLK		0
    545 #define IMX8QM_SPDIF0_EXT_CLK_DMA_DMA0_REQ_IN0			IMX8QM_SPDIF0_EXT_CLK		1
    546 #define IMX8QM_SPDIF0_EXT_CLK_LSIO_GPIO2_IO16			IMX8QM_SPDIF0_EXT_CLK		3
    547 #define IMX8QM_SPI3_SCK_DMA_SPI3_SCK				IMX8QM_SPI3_SCK			0
    548 #define IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17				IMX8QM_SPI3_SCK			3
    549 #define IMX8QM_SPI3_SDO_DMA_SPI3_SDO				IMX8QM_SPI3_SDO			0
    550 #define IMX8QM_SPI3_SDO_DMA_FTM_CH0				IMX8QM_SPI3_SDO			1
    551 #define IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18				IMX8QM_SPI3_SDO			3
    552 #define IMX8QM_SPI3_SDI_DMA_SPI3_SDI				IMX8QM_SPI3_SDI			0
    553 #define IMX8QM_SPI3_SDI_DMA_FTM_CH1				IMX8QM_SPI3_SDI			1
    554 #define IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19				IMX8QM_SPI3_SDI			3
    555 #define IMX8QM_SPI3_CS0_DMA_SPI3_CS0				IMX8QM_SPI3_CS0			0
    556 #define IMX8QM_SPI3_CS0_DMA_FTM_CH2				IMX8QM_SPI3_CS0			1
    557 #define IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20				IMX8QM_SPI3_CS0			3
    558 #define IMX8QM_SPI3_CS1_DMA_SPI3_CS1				IMX8QM_SPI3_CS1			0
    559 #define IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21				IMX8QM_SPI3_CS1			3
    560 #define IMX8QM_ESAI0_FSR_AUD_ESAI0_FSR				IMX8QM_ESAI0_FSR		0
    561 #define IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22			IMX8QM_ESAI0_FSR		3
    562 #define IMX8QM_ESAI0_FST_AUD_ESAI0_FST				IMX8QM_ESAI0_FST		0
    563 #define IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23			IMX8QM_ESAI0_FST		3
    564 #define IMX8QM_ESAI0_SCKR_AUD_ESAI0_SCKR			IMX8QM_ESAI0_SCKR		0
    565 #define IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24			IMX8QM_ESAI0_SCKR		3
    566 #define IMX8QM_ESAI0_SCKT_AUD_ESAI0_SCKT			IMX8QM_ESAI0_SCKT		0
    567 #define IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25			IMX8QM_ESAI0_SCKT		3
    568 #define IMX8QM_ESAI0_TX0_AUD_ESAI0_TX0				IMX8QM_ESAI0_TX0		0
    569 #define IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26			IMX8QM_ESAI0_TX0		3
    570 #define IMX8QM_ESAI0_TX1_AUD_ESAI0_TX1				IMX8QM_ESAI0_TX1		0
    571 #define IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27			IMX8QM_ESAI0_TX1		3
    572 #define IMX8QM_ESAI0_TX2_RX3_AUD_ESAI0_TX2_RX3			IMX8QM_ESAI0_TX2_RX3		0
    573 #define IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28			IMX8QM_ESAI0_TX2_RX3		3
    574 #define IMX8QM_ESAI0_TX3_RX2_AUD_ESAI0_TX3_RX2			IMX8QM_ESAI0_TX3_RX2		0
    575 #define IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29			IMX8QM_ESAI0_TX3_RX2		3
    576 #define IMX8QM_ESAI0_TX4_RX1_AUD_ESAI0_TX4_RX1			IMX8QM_ESAI0_TX4_RX1		0
    577 #define IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30			IMX8QM_ESAI0_TX4_RX1		3
    578 #define IMX8QM_ESAI0_TX5_RX0_AUD_ESAI0_TX5_RX0			IMX8QM_ESAI0_TX5_RX0		0
    579 #define IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31			IMX8QM_ESAI0_TX5_RX0		3
    580 #define IMX8QM_MCLK_IN0_AUD_ACM_MCLK_IN0			IMX8QM_MCLK_IN0			0
    581 #define IMX8QM_MCLK_IN0_AUD_ESAI0_RX_HF_CLK			IMX8QM_MCLK_IN0			1
    582 #define IMX8QM_MCLK_IN0_AUD_ESAI1_RX_HF_CLK			IMX8QM_MCLK_IN0			2
    583 #define IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00				IMX8QM_MCLK_IN0			3
    584 #define IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0			IMX8QM_MCLK_OUT0		0
    585 #define IMX8QM_MCLK_OUT0_AUD_ESAI0_TX_HF_CLK			IMX8QM_MCLK_OUT0		1
    586 #define IMX8QM_MCLK_OUT0_AUD_ESAI1_TX_HF_CLK			IMX8QM_MCLK_OUT0		2
    587 #define IMX8QM_MCLK_OUT0_LSIO_GPIO3_IO01			IMX8QM_MCLK_OUT0		3
    588 #define IMX8QM_SPI0_SCK_DMA_SPI0_SCK				IMX8QM_SPI0_SCK			0
    589 #define IMX8QM_SPI0_SCK_AUD_SAI0_RXC				IMX8QM_SPI0_SCK			1
    590 #define IMX8QM_SPI0_SCK_LSIO_GPIO3_IO02				IMX8QM_SPI0_SCK			3
    591 #define IMX8QM_SPI0_SDO_DMA_SPI0_SDO				IMX8QM_SPI0_SDO			0
    592 #define IMX8QM_SPI0_SDO_AUD_SAI0_TXD				IMX8QM_SPI0_SDO			1
    593 #define IMX8QM_SPI0_SDO_LSIO_GPIO3_IO03				IMX8QM_SPI0_SDO			3
    594 #define IMX8QM_SPI0_SDI_DMA_SPI0_SDI				IMX8QM_SPI0_SDI			0
    595 #define IMX8QM_SPI0_SDI_AUD_SAI0_RXD				IMX8QM_SPI0_SDI			1
    596 #define IMX8QM_SPI0_SDI_LSIO_GPIO3_IO04				IMX8QM_SPI0_SDI			3
    597 #define IMX8QM_SPI0_CS0_DMA_SPI0_CS0				IMX8QM_SPI0_CS0			0
    598 #define IMX8QM_SPI0_CS0_AUD_SAI0_RXFS				IMX8QM_SPI0_CS0			1
    599 #define IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05				IMX8QM_SPI0_CS0			3
    600 #define IMX8QM_SPI0_CS1_DMA_SPI0_CS1				IMX8QM_SPI0_CS1			0
    601 #define IMX8QM_SPI0_CS1_AUD_SAI0_TXC				IMX8QM_SPI0_CS1			1
    602 #define IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06				IMX8QM_SPI0_CS1			3
    603 #define IMX8QM_SPI2_SCK_DMA_SPI2_SCK				IMX8QM_SPI2_SCK			0
    604 #define IMX8QM_SPI2_SCK_LSIO_GPIO3_IO07				IMX8QM_SPI2_SCK			3
    605 #define IMX8QM_SPI2_SDO_DMA_SPI2_SDO				IMX8QM_SPI2_SDO			0
    606 #define IMX8QM_SPI2_SDO_LSIO_GPIO3_IO08				IMX8QM_SPI2_SDO			3
    607 #define IMX8QM_SPI2_SDI_DMA_SPI2_SDI				IMX8QM_SPI2_SDI			0
    608 #define IMX8QM_SPI2_SDI_LSIO_GPIO3_IO09				IMX8QM_SPI2_SDI			3
    609 #define IMX8QM_SPI2_CS0_DMA_SPI2_CS0				IMX8QM_SPI2_CS0			0
    610 #define IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10				IMX8QM_SPI2_CS0			3
    611 #define IMX8QM_SPI2_CS1_DMA_SPI2_CS1				IMX8QM_SPI2_CS1			0
    612 #define IMX8QM_SPI2_CS1_AUD_SAI0_TXFS				IMX8QM_SPI2_CS1			1
    613 #define IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11				IMX8QM_SPI2_CS1			3
    614 #define IMX8QM_SAI1_RXC_AUD_SAI1_RXC				IMX8QM_SAI1_RXC			0
    615 #define IMX8QM_SAI1_RXC_AUD_SAI0_TXD				IMX8QM_SAI1_RXC			1
    616 #define IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12				IMX8QM_SAI1_RXC			3
    617 #define IMX8QM_SAI1_RXD_AUD_SAI1_RXD				IMX8QM_SAI1_RXD			0
    618 #define IMX8QM_SAI1_RXD_AUD_SAI0_TXFS				IMX8QM_SAI1_RXD			1
    619 #define IMX8QM_SAI1_RXD_LSIO_GPIO3_IO13				IMX8QM_SAI1_RXD			3
    620 #define IMX8QM_SAI1_RXFS_AUD_SAI1_RXFS				IMX8QM_SAI1_RXFS		0
    621 #define IMX8QM_SAI1_RXFS_AUD_SAI0_RXD				IMX8QM_SAI1_RXFS		1
    622 #define IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14			IMX8QM_SAI1_RXFS		3
    623 #define IMX8QM_SAI1_TXC_AUD_SAI1_TXC				IMX8QM_SAI1_TXC			0
    624 #define IMX8QM_SAI1_TXC_AUD_SAI0_TXC				IMX8QM_SAI1_TXC			1
    625 #define IMX8QM_SAI1_TXC_LSIO_GPIO3_IO15				IMX8QM_SAI1_TXC			3
    626 #define IMX8QM_SAI1_TXD_AUD_SAI1_TXD				IMX8QM_SAI1_TXD			0
    627 #define IMX8QM_SAI1_TXD_AUD_SAI1_RXC				IMX8QM_SAI1_TXD			1
    628 #define IMX8QM_SAI1_TXD_LSIO_GPIO3_IO16				IMX8QM_SAI1_TXD			3
    629 #define IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS				IMX8QM_SAI1_TXFS		0
    630 #define IMX8QM_SAI1_TXFS_AUD_SAI1_RXFS				IMX8QM_SAI1_TXFS		1
    631 #define IMX8QM_SAI1_TXFS_LSIO_GPIO3_IO17			IMX8QM_SAI1_TXFS		3
    632 #define IMX8QM_ADC_IN7_DMA_ADC1_IN3				IMX8QM_ADC_IN7			0
    633 #define IMX8QM_ADC_IN7_DMA_SPI1_CS1				IMX8QM_ADC_IN7			1
    634 #define IMX8QM_ADC_IN7_LSIO_KPP0_ROW3				IMX8QM_ADC_IN7			2
    635 #define IMX8QM_ADC_IN7_LSIO_GPIO3_IO25				IMX8QM_ADC_IN7			3
    636 #define IMX8QM_ADC_IN6_DMA_ADC1_IN2				IMX8QM_ADC_IN6			0
    637 #define IMX8QM_ADC_IN6_DMA_SPI1_CS0				IMX8QM_ADC_IN6			1
    638 #define IMX8QM_ADC_IN6_LSIO_KPP0_ROW2				IMX8QM_ADC_IN6			2
    639 #define IMX8QM_ADC_IN6_LSIO_GPIO3_IO24				IMX8QM_ADC_IN6			3
    640 #define IMX8QM_ADC_IN5_DMA_ADC1_IN1				IMX8QM_ADC_IN5			0
    641 #define IMX8QM_ADC_IN5_DMA_SPI1_SDI				IMX8QM_ADC_IN5			1
    642 #define IMX8QM_ADC_IN5_LSIO_KPP0_ROW1				IMX8QM_ADC_IN5			2
    643 #define IMX8QM_ADC_IN5_LSIO_GPIO3_IO23				IMX8QM_ADC_IN5			3
    644 #define IMX8QM_ADC_IN4_DMA_ADC1_IN0				IMX8QM_ADC_IN4			0
    645 #define IMX8QM_ADC_IN4_DMA_SPI1_SDO				IMX8QM_ADC_IN4			1
    646 #define IMX8QM_ADC_IN4_LSIO_KPP0_ROW0				IMX8QM_ADC_IN4			2
    647 #define IMX8QM_ADC_IN4_LSIO_GPIO3_IO22				IMX8QM_ADC_IN4			3
    648 #define IMX8QM_ADC_IN3_DMA_ADC0_IN3				IMX8QM_ADC_IN3			0
    649 #define IMX8QM_ADC_IN3_DMA_SPI1_SCK				IMX8QM_ADC_IN3			1
    650 #define IMX8QM_ADC_IN3_LSIO_KPP0_COL3				IMX8QM_ADC_IN3			2
    651 #define IMX8QM_ADC_IN3_LSIO_GPIO3_IO21				IMX8QM_ADC_IN3			3
    652 #define IMX8QM_ADC_IN2_DMA_ADC0_IN2				IMX8QM_ADC_IN2			0
    653 #define IMX8QM_ADC_IN2_LSIO_KPP0_COL2				IMX8QM_ADC_IN2			2
    654 #define IMX8QM_ADC_IN2_LSIO_GPIO3_IO20				IMX8QM_ADC_IN2			3
    655 #define IMX8QM_ADC_IN1_DMA_ADC0_IN1				IMX8QM_ADC_IN1			0
    656 #define IMX8QM_ADC_IN1_LSIO_KPP0_COL1				IMX8QM_ADC_IN1			2
    657 #define IMX8QM_ADC_IN1_LSIO_GPIO3_IO19				IMX8QM_ADC_IN1			3
    658 #define IMX8QM_ADC_IN0_DMA_ADC0_IN0				IMX8QM_ADC_IN0			0
    659 #define IMX8QM_ADC_IN0_LSIO_KPP0_COL0				IMX8QM_ADC_IN0			2
    660 #define IMX8QM_ADC_IN0_LSIO_GPIO3_IO18				IMX8QM_ADC_IN0			3
    661 #define IMX8QM_MLB_SIG_CONN_MLB_SIG				IMX8QM_MLB_SIG			0
    662 #define IMX8QM_MLB_SIG_AUD_SAI3_RXC				IMX8QM_MLB_SIG			1
    663 #define IMX8QM_MLB_SIG_LSIO_GPIO3_IO26				IMX8QM_MLB_SIG			3
    664 #define IMX8QM_MLB_CLK_CONN_MLB_CLK				IMX8QM_MLB_CLK			0
    665 #define IMX8QM_MLB_CLK_AUD_SAI3_RXFS				IMX8QM_MLB_CLK			1
    666 #define IMX8QM_MLB_CLK_LSIO_GPIO3_IO27				IMX8QM_MLB_CLK			3
    667 #define IMX8QM_MLB_DATA_CONN_MLB_DATA				IMX8QM_MLB_DATA			0
    668 #define IMX8QM_MLB_DATA_AUD_SAI3_RXD				IMX8QM_MLB_DATA			1
    669 #define IMX8QM_MLB_DATA_LSIO_GPIO3_IO28				IMX8QM_MLB_DATA			3
    670 #define IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX			IMX8QM_FLEXCAN0_RX		0
    671 #define IMX8QM_FLEXCAN0_RX_LSIO_GPIO3_IO29			IMX8QM_FLEXCAN0_RX		3
    672 #define IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX			IMX8QM_FLEXCAN0_TX		0
    673 #define IMX8QM_FLEXCAN0_TX_LSIO_GPIO3_IO30			IMX8QM_FLEXCAN0_TX		3
    674 #define IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX			IMX8QM_FLEXCAN1_RX		0
    675 #define IMX8QM_FLEXCAN1_RX_LSIO_GPIO3_IO31			IMX8QM_FLEXCAN1_RX		3
    676 #define IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX			IMX8QM_FLEXCAN1_TX		0
    677 #define IMX8QM_FLEXCAN1_TX_LSIO_GPIO4_IO00			IMX8QM_FLEXCAN1_TX		3
    678 #define IMX8QM_FLEXCAN2_RX_DMA_FLEXCAN2_RX			IMX8QM_FLEXCAN2_RX		0
    679 #define IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01			IMX8QM_FLEXCAN2_RX		3
    680 #define IMX8QM_FLEXCAN2_TX_DMA_FLEXCAN2_TX			IMX8QM_FLEXCAN2_TX		0
    681 #define IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02			IMX8QM_FLEXCAN2_TX		3
    682 #define IMX8QM_USB_SS3_TC0_DMA_I2C1_SCL				IMX8QM_USB_SS3_TC0		0
    683 #define IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR			IMX8QM_USB_SS3_TC0		1
    684 #define IMX8QM_USB_SS3_TC0_LSIO_GPIO4_IO03			IMX8QM_USB_SS3_TC0		3
    685 #define IMX8QM_USB_SS3_TC1_DMA_I2C1_SCL				IMX8QM_USB_SS3_TC1		0
    686 #define IMX8QM_USB_SS3_TC1_CONN_USB_OTG2_PWR			IMX8QM_USB_SS3_TC1		1
    687 #define IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04			IMX8QM_USB_SS3_TC1		3
    688 #define IMX8QM_USB_SS3_TC2_DMA_I2C1_SDA				IMX8QM_USB_SS3_TC2		0
    689 #define IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC			IMX8QM_USB_SS3_TC2		1
    690 #define IMX8QM_USB_SS3_TC2_LSIO_GPIO4_IO05			IMX8QM_USB_SS3_TC2		3
    691 #define IMX8QM_USB_SS3_TC3_DMA_I2C1_SDA				IMX8QM_USB_SS3_TC3		0
    692 #define IMX8QM_USB_SS3_TC3_CONN_USB_OTG2_OC			IMX8QM_USB_SS3_TC3		1
    693 #define IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06			IMX8QM_USB_SS3_TC3		3
    694 #define IMX8QM_USDHC1_RESET_B_CONN_USDHC1_RESET_B		IMX8QM_USDHC1_RESET_B		0
    695 #define IMX8QM_USDHC1_RESET_B_LSIO_GPIO4_IO07			IMX8QM_USDHC1_RESET_B		3
    696 #define IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT		IMX8QM_USDHC1_VSELECT		0
    697 #define IMX8QM_USDHC1_VSELECT_LSIO_GPIO4_IO08			IMX8QM_USDHC1_VSELECT		3
    698 #define IMX8QM_USDHC2_RESET_B_CONN_USDHC2_RESET_B		IMX8QM_USDHC2_RESET_B		0
    699 #define IMX8QM_USDHC2_RESET_B_LSIO_GPIO4_IO09			IMX8QM_USDHC2_RESET_B		3
    700 #define IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT		IMX8QM_USDHC2_VSELECT		0
    701 #define IMX8QM_USDHC2_VSELECT_LSIO_GPIO4_IO10			IMX8QM_USDHC2_VSELECT		3
    702 #define IMX8QM_USDHC2_WP_CONN_USDHC2_WP				IMX8QM_USDHC2_WP		0
    703 #define IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11			IMX8QM_USDHC2_WP		3
    704 #define IMX8QM_USDHC2_CD_B_CONN_USDHC2_CD_B			IMX8QM_USDHC2_CD_B		0
    705 #define IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12			IMX8QM_USDHC2_CD_B		3
    706 #define IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO			IMX8QM_ENET0_MDIO		0
    707 #define IMX8QM_ENET0_MDIO_DMA_I2C4_SDA				IMX8QM_ENET0_MDIO		1
    708 #define IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13			IMX8QM_ENET0_MDIO		3
    709 #define IMX8QM_ENET0_MDC_CONN_ENET0_MDC				IMX8QM_ENET0_MDC		0
    710 #define IMX8QM_ENET0_MDC_DMA_I2C4_SCL				IMX8QM_ENET0_MDC		1
    711 #define IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14			IMX8QM_ENET0_MDC		3
    712 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	IMX8QM_ENET0_REFCLK_125M_25M	0
    713 #define IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_PPS		IMX8QM_ENET0_REFCLK_125M_25M	1
    714 #define IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15		IMX8QM_ENET0_REFCLK_125M_25M	3
    715 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET1_REFCLK_125M_25M	IMX8QM_ENET1_REFCLK_125M_25M	0
    716 #define IMX8QM_ENET1_REFCLK_125M_25M_CONN_ENET1_PPS		IMX8QM_ENET1_REFCLK_125M_25M	1
    717 #define IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16		IMX8QM_ENET1_REFCLK_125M_25M	3
    718 #define IMX8QM_ENET1_MDIO_CONN_ENET1_MDIO			IMX8QM_ENET1_MDIO		0
    719 #define IMX8QM_ENET1_MDIO_DMA_I2C4_SDA				IMX8QM_ENET1_MDIO		1
    720 #define IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17			IMX8QM_ENET1_MDIO		3
    721 #define IMX8QM_ENET1_MDC_CONN_ENET1_MDC				IMX8QM_ENET1_MDC		0
    722 #define IMX8QM_ENET1_MDC_DMA_I2C4_SCL				IMX8QM_ENET1_MDC		1
    723 #define IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18			IMX8QM_ENET1_MDC		3
    724 #define IMX8QM_QSPI1A_SS0_B_LSIO_QSPI1A_SS0_B			IMX8QM_QSPI1A_SS0_B		0
    725 #define IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19			IMX8QM_QSPI1A_SS0_B		3
    726 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SS1_B			IMX8QM_QSPI1A_SS1_B		0
    727 #define IMX8QM_QSPI1A_SS1_B_LSIO_QSPI1A_SCLK2			IMX8QM_QSPI1A_SS1_B		1
    728 #define IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20			IMX8QM_QSPI1A_SS1_B		3
    729 #define IMX8QM_QSPI1A_SCLK_LSIO_QSPI1A_SCLK			IMX8QM_QSPI1A_SCLK		0
    730 #define IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21			IMX8QM_QSPI1A_SCLK		3
    731 #define IMX8QM_QSPI1A_DQS_LSIO_QSPI1A_DQS			IMX8QM_QSPI1A_DQS		0
    732 #define IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22			IMX8QM_QSPI1A_DQS		3
    733 #define IMX8QM_QSPI1A_DATA3_LSIO_QSPI1A_DATA3			IMX8QM_QSPI1A_DATA3		0
    734 #define IMX8QM_QSPI1A_DATA3_DMA_I2C1_SDA			IMX8QM_QSPI1A_DATA3		1
    735 #define IMX8QM_QSPI1A_DATA3_CONN_USB_OTG1_OC			IMX8QM_QSPI1A_DATA3		2
    736 #define IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23			IMX8QM_QSPI1A_DATA3		3
    737 #define IMX8QM_QSPI1A_DATA2_LSIO_QSPI1A_DATA2			IMX8QM_QSPI1A_DATA2		0
    738 #define IMX8QM_QSPI1A_DATA2_DMA_I2C1_SCL			IMX8QM_QSPI1A_DATA2		1
    739 #define IMX8QM_QSPI1A_DATA2_CONN_USB_OTG2_PWR			IMX8QM_QSPI1A_DATA2		2
    740 #define IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24			IMX8QM_QSPI1A_DATA2		3
    741 #define IMX8QM_QSPI1A_DATA1_LSIO_QSPI1A_DATA1			IMX8QM_QSPI1A_DATA1		0
    742 #define IMX8QM_QSPI1A_DATA1_DMA_I2C1_SDA			IMX8QM_QSPI1A_DATA1		1
    743 #define IMX8QM_QSPI1A_DATA1_CONN_USB_OTG2_OC			IMX8QM_QSPI1A_DATA1		2
    744 #define IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25			IMX8QM_QSPI1A_DATA1		3
    745 #define IMX8QM_QSPI1A_DATA0_LSIO_QSPI1A_DATA0			IMX8QM_QSPI1A_DATA0		0
    746 #define IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26			IMX8QM_QSPI1A_DATA0		3
    747 #define IMX8QM_QSPI0A_DATA0_LSIO_QSPI0A_DATA0			IMX8QM_QSPI0A_DATA0		0
    748 #define IMX8QM_QSPI0A_DATA1_LSIO_QSPI0A_DATA1			IMX8QM_QSPI0A_DATA1		0
    749 #define IMX8QM_QSPI0A_DATA2_LSIO_QSPI0A_DATA2			IMX8QM_QSPI0A_DATA2		0
    750 #define IMX8QM_QSPI0A_DATA3_LSIO_QSPI0A_DATA3			IMX8QM_QSPI0A_DATA3		0
    751 #define IMX8QM_QSPI0A_DQS_LSIO_QSPI0A_DQS			IMX8QM_QSPI0A_DQS		0
    752 #define IMX8QM_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B			IMX8QM_QSPI0A_SS0_B		0
    753 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B			IMX8QM_QSPI0A_SS1_B		0
    754 #define IMX8QM_QSPI0A_SS1_B_LSIO_QSPI0A_SCLK2			IMX8QM_QSPI0A_SS1_B		1
    755 #define IMX8QM_QSPI0A_SCLK_LSIO_QSPI0A_SCLK			IMX8QM_QSPI0A_SCLK		0
    756 #define IMX8QM_QSPI0B_SCLK_LSIO_QSPI0B_SCLK			IMX8QM_QSPI0B_SCLK		0
    757 #define IMX8QM_QSPI0B_DATA0_LSIO_QSPI0B_DATA0			IMX8QM_QSPI0B_DATA0		0
    758 #define IMX8QM_QSPI0B_DATA1_LSIO_QSPI0B_DATA1			IMX8QM_QSPI0B_DATA1		0
    759 #define IMX8QM_QSPI0B_DATA2_LSIO_QSPI0B_DATA2			IMX8QM_QSPI0B_DATA2		0
    760 #define IMX8QM_QSPI0B_DATA3_LSIO_QSPI0B_DATA3			IMX8QM_QSPI0B_DATA3		0
    761 #define IMX8QM_QSPI0B_DQS_LSIO_QSPI0B_DQS			IMX8QM_QSPI0B_DQS		0
    762 #define IMX8QM_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B			IMX8QM_QSPI0B_SS0_B		0
    763 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B			IMX8QM_QSPI0B_SS1_B		0
    764 #define IMX8QM_QSPI0B_SS1_B_LSIO_QSPI0B_SCLK2			IMX8QM_QSPI0B_SS1_B		1
    765 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B		IMX8QM_PCIE_CTRL0_CLKREQ_B	0
    766 #define IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27		IMX8QM_PCIE_CTRL0_CLKREQ_B	3
    767 #define IMX8QM_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WAKE_B		IMX8QM_PCIE_CTRL0_WAKE_B	0
    768 #define IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28		IMX8QM_PCIE_CTRL0_WAKE_B	3
    769 #define IMX8QM_PCIE_CTRL0_PERST_B_HSIO_PCIE0_PERST_B		IMX8QM_PCIE_CTRL0_PERST_B	0
    770 #define IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29		IMX8QM_PCIE_CTRL0_PERST_B	3
    771 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_HSIO_PCIE1_CLKREQ_B		IMX8QM_PCIE_CTRL1_CLKREQ_B	0
    772 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_DMA_I2C1_SDA			IMX8QM_PCIE_CTRL1_CLKREQ_B	1
    773 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_CONN_USB_OTG2_OC		IMX8QM_PCIE_CTRL1_CLKREQ_B	2
    774 #define IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30		IMX8QM_PCIE_CTRL1_CLKREQ_B	3
    775 #define IMX8QM_PCIE_CTRL1_WAKE_B_HSIO_PCIE1_WAKE_B		IMX8QM_PCIE_CTRL1_WAKE_B	0
    776 #define IMX8QM_PCIE_CTRL1_WAKE_B_DMA_I2C1_SCL			IMX8QM_PCIE_CTRL1_WAKE_B	1
    777 #define IMX8QM_PCIE_CTRL1_WAKE_B_CONN_USB_OTG2_PWR		IMX8QM_PCIE_CTRL1_WAKE_B	2
    778 #define IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31		IMX8QM_PCIE_CTRL1_WAKE_B	3
    779 #define IMX8QM_PCIE_CTRL1_PERST_B_HSIO_PCIE1_PERST_B		IMX8QM_PCIE_CTRL1_PERST_B	0
    780 #define IMX8QM_PCIE_CTRL1_PERST_B_DMA_I2C1_SCL			IMX8QM_PCIE_CTRL1_PERST_B	1
    781 #define IMX8QM_PCIE_CTRL1_PERST_B_CONN_USB_OTG1_PWR		IMX8QM_PCIE_CTRL1_PERST_B	2
    782 #define IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00		IMX8QM_PCIE_CTRL1_PERST_B	3
    783 #define IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA		IMX8QM_USB_HSIC0_DATA		0
    784 #define IMX8QM_USB_HSIC0_DATA_DMA_I2C1_SDA			IMX8QM_USB_HSIC0_DATA		1
    785 #define IMX8QM_USB_HSIC0_DATA_LSIO_GPIO5_IO01			IMX8QM_USB_HSIC0_DATA		3
    786 #define IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE		IMX8QM_USB_HSIC0_STROBE		0
    787 #define IMX8QM_USB_HSIC0_STROBE_DMA_I2C1_SCL			IMX8QM_USB_HSIC0_STROBE		1
    788 #define IMX8QM_USB_HSIC0_STROBE_LSIO_GPIO5_IO02			IMX8QM_USB_HSIC0_STROBE		3
    789 #define IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK				IMX8QM_EMMC0_CLK		0
    790 #define IMX8QM_EMMC0_CLK_CONN_NAND_READY_B			IMX8QM_EMMC0_CLK		1
    791 #define IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD				IMX8QM_EMMC0_CMD		0
    792 #define IMX8QM_EMMC0_CMD_CONN_NAND_DQS				IMX8QM_EMMC0_CMD		1
    793 #define IMX8QM_EMMC0_CMD_AUD_MQS_R				IMX8QM_EMMC0_CMD		2
    794 #define IMX8QM_EMMC0_CMD_LSIO_GPIO5_IO03			IMX8QM_EMMC0_CMD		3
    795 #define IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0			IMX8QM_EMMC0_DATA0		0
    796 #define IMX8QM_EMMC0_DATA0_CONN_NAND_DATA00			IMX8QM_EMMC0_DATA0		1
    797 #define IMX8QM_EMMC0_DATA0_LSIO_GPIO5_IO04			IMX8QM_EMMC0_DATA0		3
    798 #define IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1			IMX8QM_EMMC0_DATA1		0
    799 #define IMX8QM_EMMC0_DATA1_CONN_NAND_DATA01			IMX8QM_EMMC0_DATA1		1
    800 #define IMX8QM_EMMC0_DATA1_LSIO_GPIO5_IO05			IMX8QM_EMMC0_DATA1		3
    801 #define IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2			IMX8QM_EMMC0_DATA2		0
    802 #define IMX8QM_EMMC0_DATA2_CONN_NAND_DATA02			IMX8QM_EMMC0_DATA2		1
    803 #define IMX8QM_EMMC0_DATA2_LSIO_GPIO5_IO06			IMX8QM_EMMC0_DATA2		3
    804 #define IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3			IMX8QM_EMMC0_DATA3		0
    805 #define IMX8QM_EMMC0_DATA3_CONN_NAND_DATA03			IMX8QM_EMMC0_DATA3		1
    806 #define IMX8QM_EMMC0_DATA3_LSIO_GPIO5_IO07			IMX8QM_EMMC0_DATA3		3
    807 #define IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4			IMX8QM_EMMC0_DATA4		0
    808 #define IMX8QM_EMMC0_DATA4_CONN_NAND_DATA04			IMX8QM_EMMC0_DATA4		1
    809 #define IMX8QM_EMMC0_DATA4_LSIO_GPIO5_IO08			IMX8QM_EMMC0_DATA4		3
    810 #define IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5			IMX8QM_EMMC0_DATA5		0
    811 #define IMX8QM_EMMC0_DATA5_CONN_NAND_DATA05			IMX8QM_EMMC0_DATA5		1
    812 #define IMX8QM_EMMC0_DATA5_LSIO_GPIO5_IO09			IMX8QM_EMMC0_DATA5		3
    813 #define IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6			IMX8QM_EMMC0_DATA6		0
    814 #define IMX8QM_EMMC0_DATA6_CONN_NAND_DATA06			IMX8QM_EMMC0_DATA6		1
    815 #define IMX8QM_EMMC0_DATA6_LSIO_GPIO5_IO10			IMX8QM_EMMC0_DATA6		3
    816 #define IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7			IMX8QM_EMMC0_DATA7		0
    817 #define IMX8QM_EMMC0_DATA7_CONN_NAND_DATA07			IMX8QM_EMMC0_DATA7		1
    818 #define IMX8QM_EMMC0_DATA7_LSIO_GPIO5_IO11			IMX8QM_EMMC0_DATA7		3
    819 #define IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE			IMX8QM_EMMC0_STROBE		0
    820 #define IMX8QM_EMMC0_STROBE_CONN_NAND_CLE			IMX8QM_EMMC0_STROBE		1
    821 #define IMX8QM_EMMC0_STROBE_LSIO_GPIO5_IO12			IMX8QM_EMMC0_STROBE		3
    822 #define IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B			IMX8QM_EMMC0_RESET_B		0
    823 #define IMX8QM_EMMC0_RESET_B_CONN_NAND_WP_B			IMX8QM_EMMC0_RESET_B		1
    824 #define IMX8QM_EMMC0_RESET_B_CONN_USDHC1_VSELECT		IMX8QM_EMMC0_RESET_B		2
    825 #define IMX8QM_EMMC0_RESET_B_LSIO_GPIO5_IO13			IMX8QM_EMMC0_RESET_B		3
    826 #define IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK			IMX8QM_USDHC1_CLK		0
    827 #define IMX8QM_USDHC1_CLK_AUD_MQS_R				IMX8QM_USDHC1_CLK		1
    828 #define IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD			IMX8QM_USDHC1_CMD		0
    829 #define IMX8QM_USDHC1_CMD_AUD_MQS_L				IMX8QM_USDHC1_CMD		1
    830 #define IMX8QM_USDHC1_CMD_LSIO_GPIO5_IO14			IMX8QM_USDHC1_CMD		3
    831 #define IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0			IMX8QM_USDHC1_DATA0		0
    832 #define IMX8QM_USDHC1_DATA0_CONN_NAND_RE_N			IMX8QM_USDHC1_DATA0		1
    833 #define IMX8QM_USDHC1_DATA0_LSIO_GPIO5_IO15			IMX8QM_USDHC1_DATA0		3
    834 #define IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1			IMX8QM_USDHC1_DATA1		0
    835 #define IMX8QM_USDHC1_DATA1_CONN_NAND_RE_P			IMX8QM_USDHC1_DATA1		1
    836 #define IMX8QM_USDHC1_DATA1_LSIO_GPIO5_IO16			IMX8QM_USDHC1_DATA1		3
    837 #define IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2			IMX8QM_USDHC1_DATA2		0
    838 #define IMX8QM_USDHC1_DATA2_CONN_NAND_DQS_N			IMX8QM_USDHC1_DATA2		1
    839 #define IMX8QM_USDHC1_DATA2_LSIO_GPIO5_IO17			IMX8QM_USDHC1_DATA2		3
    840 #define IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3			IMX8QM_USDHC1_DATA3		0
    841 #define IMX8QM_USDHC1_DATA3_CONN_NAND_DQS_P			IMX8QM_USDHC1_DATA3		1
    842 #define IMX8QM_USDHC1_DATA3_LSIO_GPIO5_IO18			IMX8QM_USDHC1_DATA3		3
    843 #define IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4			IMX8QM_USDHC1_DATA4		0
    844 #define IMX8QM_USDHC1_DATA4_CONN_NAND_CE0_B			IMX8QM_USDHC1_DATA4		1
    845 #define IMX8QM_USDHC1_DATA4_AUD_MQS_R				IMX8QM_USDHC1_DATA4		2
    846 #define IMX8QM_USDHC1_DATA4_LSIO_GPIO5_IO19			IMX8QM_USDHC1_DATA4		3
    847 #define IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5			IMX8QM_USDHC1_DATA5		0
    848 #define IMX8QM_USDHC1_DATA5_CONN_NAND_RE_B			IMX8QM_USDHC1_DATA5		1
    849 #define IMX8QM_USDHC1_DATA5_AUD_MQS_L				IMX8QM_USDHC1_DATA5		2
    850 #define IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20			IMX8QM_USDHC1_DATA5		3
    851 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6			IMX8QM_USDHC1_DATA6		0
    852 #define IMX8QM_USDHC1_DATA6_CONN_NAND_WE_B			IMX8QM_USDHC1_DATA6		1
    853 #define IMX8QM_USDHC1_DATA6_CONN_USDHC1_WP			IMX8QM_USDHC1_DATA6		2
    854 #define IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21			IMX8QM_USDHC1_DATA6		3
    855 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7			IMX8QM_USDHC1_DATA7		0
    856 #define IMX8QM_USDHC1_DATA7_CONN_NAND_ALE			IMX8QM_USDHC1_DATA7		1
    857 #define IMX8QM_USDHC1_DATA7_CONN_USDHC1_CD_B			IMX8QM_USDHC1_DATA7		2
    858 #define IMX8QM_USDHC1_DATA7_LSIO_GPIO5_IO22			IMX8QM_USDHC1_DATA7		3
    859 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_STROBE			IMX8QM_USDHC1_STROBE		0
    860 #define IMX8QM_USDHC1_STROBE_CONN_NAND_CE1_B			IMX8QM_USDHC1_STROBE		1
    861 #define IMX8QM_USDHC1_STROBE_CONN_USDHC1_RESET_B		IMX8QM_USDHC1_STROBE		2
    862 #define IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23			IMX8QM_USDHC1_STROBE		3
    863 #define IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK			IMX8QM_USDHC2_CLK		0
    864 #define IMX8QM_USDHC2_CLK_AUD_MQS_R				IMX8QM_USDHC2_CLK		1
    865 #define IMX8QM_USDHC2_CLK_LSIO_GPIO5_IO24			IMX8QM_USDHC2_CLK		3
    866 #define IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD			IMX8QM_USDHC2_CMD		0
    867 #define IMX8QM_USDHC2_CMD_AUD_MQS_L				IMX8QM_USDHC2_CMD		1
    868 #define IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25			IMX8QM_USDHC2_CMD		3
    869 #define IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0			IMX8QM_USDHC2_DATA0		0
    870 #define IMX8QM_USDHC2_DATA0_DMA_UART4_RX			IMX8QM_USDHC2_DATA0		1
    871 #define IMX8QM_USDHC2_DATA0_LSIO_GPIO5_IO26			IMX8QM_USDHC2_DATA0		3
    872 #define IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1			IMX8QM_USDHC2_DATA1		0
    873 #define IMX8QM_USDHC2_DATA1_DMA_UART4_TX			IMX8QM_USDHC2_DATA1		1
    874 #define IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27			IMX8QM_USDHC2_DATA1		3
    875 #define IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2			IMX8QM_USDHC2_DATA2		0
    876 #define IMX8QM_USDHC2_DATA2_DMA_UART4_CTS_B			IMX8QM_USDHC2_DATA2		1
    877 #define IMX8QM_USDHC2_DATA2_LSIO_GPIO5_IO28			IMX8QM_USDHC2_DATA2		3
    878 #define IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3			IMX8QM_USDHC2_DATA3		0
    879 #define IMX8QM_USDHC2_DATA3_DMA_UART4_RTS_B			IMX8QM_USDHC2_DATA3		1
    880 #define IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29			IMX8QM_USDHC2_DATA3		3
    881 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC		IMX8QM_ENET0_RGMII_TXC		0
    882 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT		IMX8QM_ENET0_RGMII_TXC		1
    883 #define IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_IN		IMX8QM_ENET0_RGMII_TXC		2
    884 #define IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30			IMX8QM_ENET0_RGMII_TXC		3
    885 #define IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	IMX8QM_ENET0_RGMII_TX_CTL	0
    886 #define IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31		IMX8QM_ENET0_RGMII_TX_CTL	3
    887 #define IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0		IMX8QM_ENET0_RGMII_TXD0		0
    888 #define IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00			IMX8QM_ENET0_RGMII_TXD0		3
    889 #define IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1		IMX8QM_ENET0_RGMII_TXD1		0
    890 #define IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01			IMX8QM_ENET0_RGMII_TXD1		3
    891 #define IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2		IMX8QM_ENET0_RGMII_TXD2		0
    892 #define IMX8QM_ENET0_RGMII_TXD2_DMA_UART3_TX			IMX8QM_ENET0_RGMII_TXD2		1
    893 #define IMX8QM_ENET0_RGMII_TXD2_VPU_TSI_S1_VID			IMX8QM_ENET0_RGMII_TXD2		2
    894 #define IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02			IMX8QM_ENET0_RGMII_TXD2		3
    895 #define IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3		IMX8QM_ENET0_RGMII_TXD3		0
    896 #define IMX8QM_ENET0_RGMII_TXD3_DMA_UART3_RTS_B			IMX8QM_ENET0_RGMII_TXD3		1
    897 #define IMX8QM_ENET0_RGMII_TXD3_VPU_TSI_S1_SYNC			IMX8QM_ENET0_RGMII_TXD3		2
    898 #define IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03			IMX8QM_ENET0_RGMII_TXD3		3
    899 #define IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC		IMX8QM_ENET0_RGMII_RXC		0
    900 #define IMX8QM_ENET0_RGMII_RXC_DMA_UART3_CTS_B			IMX8QM_ENET0_RGMII_RXC		1
    901 #define IMX8QM_ENET0_RGMII_RXC_VPU_TSI_S1_DATA			IMX8QM_ENET0_RGMII_RXC		2
    902 #define IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04			IMX8QM_ENET0_RGMII_RXC		3
    903 #define IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	IMX8QM_ENET0_RGMII_RX_CTL	0
    904 #define IMX8QM_ENET0_RGMII_RX_CTL_VPU_TSI_S0_VID		IMX8QM_ENET0_RGMII_RX_CTL	2
    905 #define IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05		IMX8QM_ENET0_RGMII_RX_CTL	3
    906 #define IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0		IMX8QM_ENET0_RGMII_RXD0		0
    907 #define IMX8QM_ENET0_RGMII_RXD0_VPU_TSI_S0_SYNC			IMX8QM_ENET0_RGMII_RXD0		2
    908 #define IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06			IMX8QM_ENET0_RGMII_RXD0		3
    909 #define IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1		IMX8QM_ENET0_RGMII_RXD1		0
    910 #define IMX8QM_ENET0_RGMII_RXD1_VPU_TSI_S0_DATA			IMX8QM_ENET0_RGMII_RXD1		2
    911 #define IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07			IMX8QM_ENET0_RGMII_RXD1		3
    912 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2		IMX8QM_ENET0_RGMII_RXD2		0
    913 #define IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER		IMX8QM_ENET0_RGMII_RXD2		1
    914 #define IMX8QM_ENET0_RGMII_RXD2_VPU_TSI_S0_CLK			IMX8QM_ENET0_RGMII_RXD2		2
    915 #define IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08			IMX8QM_ENET0_RGMII_RXD2		3
    916 #define IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3		IMX8QM_ENET0_RGMII_RXD3		0
    917 #define IMX8QM_ENET0_RGMII_RXD3_DMA_UART3_RX			IMX8QM_ENET0_RGMII_RXD3		1
    918 #define IMX8QM_ENET0_RGMII_RXD3_VPU_TSI_S1_CLK			IMX8QM_ENET0_RGMII_RXD3		2
    919 #define IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09			IMX8QM_ENET0_RGMII_RXD3		3
    920 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RGMII_TXC		IMX8QM_ENET1_RGMII_TXC		0
    921 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_OUT		IMX8QM_ENET1_RGMII_TXC		1
    922 #define IMX8QM_ENET1_RGMII_TXC_CONN_ENET1_RCLK50M_IN		IMX8QM_ENET1_RGMII_TXC		2
    923 #define IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10			IMX8QM_ENET1_RGMII_TXC		3
    924 #define IMX8QM_ENET1_RGMII_TX_CTL_CONN_ENET1_RGMII_TX_CTL	IMX8QM_ENET1_RGMII_TX_CTL	0
    925 #define IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11		IMX8QM_ENET1_RGMII_TX_CTL	3
    926 #define IMX8QM_ENET1_RGMII_TXD0_CONN_ENET1_RGMII_TXD0		IMX8QM_ENET1_RGMII_TXD0		0
    927 #define IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12			IMX8QM_ENET1_RGMII_TXD0		3
    928 #define IMX8QM_ENET1_RGMII_TXD1_CONN_ENET1_RGMII_TXD1		IMX8QM_ENET1_RGMII_TXD1		0
    929 #define IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13			IMX8QM_ENET1_RGMII_TXD1		3
    930 #define IMX8QM_ENET1_RGMII_TXD2_CONN_ENET1_RGMII_TXD2		IMX8QM_ENET1_RGMII_TXD2		0
    931 #define IMX8QM_ENET1_RGMII_TXD2_DMA_UART3_TX			IMX8QM_ENET1_RGMII_TXD2		1
    932 #define IMX8QM_ENET1_RGMII_TXD2_VPU_TSI_S1_VID			IMX8QM_ENET1_RGMII_TXD2		2
    933 #define IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14			IMX8QM_ENET1_RGMII_TXD2		3
    934 #define IMX8QM_ENET1_RGMII_TXD3_CONN_ENET1_RGMII_TXD3		IMX8QM_ENET1_RGMII_TXD3		0
    935 #define IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B			IMX8QM_ENET1_RGMII_TXD3		1
    936 #define IMX8QM_ENET1_RGMII_TXD3_VPU_TSI_S1_SYNC			IMX8QM_ENET1_RGMII_TXD3		2
    937 #define IMX8QM_ENET1_RGMII_TXD3_LSIO_GPIO6_IO15			IMX8QM_ENET1_RGMII_TXD3		3
    938 #define IMX8QM_ENET1_RGMII_RXC_CONN_ENET1_RGMII_RXC		IMX8QM_ENET1_RGMII_RXC		0
    939 #define IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B			IMX8QM_ENET1_RGMII_RXC		1
    940 #define IMX8QM_ENET1_RGMII_RXC_VPU_TSI_S1_DATA			IMX8QM_ENET1_RGMII_RXC		2
    941 #define IMX8QM_ENET1_RGMII_RXC_LSIO_GPIO6_IO16			IMX8QM_ENET1_RGMII_RXC		3
    942 #define IMX8QM_ENET1_RGMII_RX_CTL_CONN_ENET1_RGMII_RX_CTL	IMX8QM_ENET1_RGMII_RX_CTL	0
    943 #define IMX8QM_ENET1_RGMII_RX_CTL_VPU_TSI_S0_VID		IMX8QM_ENET1_RGMII_RX_CTL	2
    944 #define IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17		IMX8QM_ENET1_RGMII_RX_CTL	3
    945 #define IMX8QM_ENET1_RGMII_RXD0_CONN_ENET1_RGMII_RXD0		IMX8QM_ENET1_RGMII_RXD0		0
    946 #define IMX8QM_ENET1_RGMII_RXD0_VPU_TSI_S0_SYNC			IMX8QM_ENET1_RGMII_RXD0		2
    947 #define IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18			IMX8QM_ENET1_RGMII_RXD0		3
    948 #define IMX8QM_ENET1_RGMII_RXD1_CONN_ENET1_RGMII_RXD1		IMX8QM_ENET1_RGMII_RXD1		0
    949 #define IMX8QM_ENET1_RGMII_RXD1_VPU_TSI_S0_DATA			IMX8QM_ENET1_RGMII_RXD1		2
    950 #define IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19			IMX8QM_ENET1_RGMII_RXD1		3
    951 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RGMII_RXD2		IMX8QM_ENET1_RGMII_RXD2		0
    952 #define IMX8QM_ENET1_RGMII_RXD2_CONN_ENET1_RMII_RX_ER		IMX8QM_ENET1_RGMII_RXD2		1
    953 #define IMX8QM_ENET1_RGMII_RXD2_VPU_TSI_S0_CLK			IMX8QM_ENET1_RGMII_RXD2		2
    954 #define IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20			IMX8QM_ENET1_RGMII_RXD2		3
    955 #define IMX8QM_ENET1_RGMII_RXD3_CONN_ENET1_RGMII_RXD3		IMX8QM_ENET1_RGMII_RXD3		0
    956 #define IMX8QM_ENET1_RGMII_RXD3_DMA_UART3_RX			IMX8QM_ENET1_RGMII_RXD3		1
    957 #define IMX8QM_ENET1_RGMII_RXD3_VPU_TSI_S1_CLK			IMX8QM_ENET1_RGMII_RXD3		2
    958 #define IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21			IMX8QM_ENET1_RGMII_RXD3		3
    959 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD		IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB		0
    960 #define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD		IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA		0
    961 
    962 #endif /* _IMX8QM_PADS_H */
    963